Rethinking Chip Reliability For Harsh Conditions
By Gregory Haley - 10 Jun, 2025 - Comments: 0

As semiconductors push into environments once considered untenable, reliability expectations are being redefined. From the vacuum of space and the inside of jet engines to deep industrial automation and electrified drivetrains, chips now must endure extreme temperature swings, corrosive atmospheres, mechanical vibration, radiation, and unpredictable power cycles, all while delivering increasing... » read more

High-Quality Data Needed To Better Utilize Fab Data Streams
By Anne Meixner - 10 Jun, 2025 - Comments: 0

Fab operations have wrestled with big data management issues for decades. Standards help, but only if sufficient attention to detail is taken during collection. Semiconductor wafer manufaFcturing represents one of the most complex manufacturing processes in the world. With each generation of process improvement comes more sophisticated fab equipment, new process recipes, and exponential incr... » read more

The Data Dilemma In Semiconductor Testing And Why It Matters: Part 1
By Roberto Colecchia - 10 Jun, 2025 - Comments: 0

In today’s semiconductor industry, machine learning (ML) is no longer a buzzword — it’s an operational necessity. From optimizing test flows to identifying device drifts and executing advanced analytics like VMIN or trimming, ML-based applications are increasingly used to boost yields, improve quality, and lower test costs. But there’s a catch. To make these intelligent applications ... » read more

Stress-Related Local Layout Effects In FinFET Technology And Device Design Sensitivity
By PDF Solutions - 10 Jun, 2025 - Comments: 0

Abstract: "Transistor characteristics in advanced technology nodes are strongly impacted by devices design and process integration choices. Variation in the layout and pattern configuration in close proximity to the device often causes undesirable sensitivities known as Local Layout Effects (LLEs). One of the sensitivities is related to carrier mobility dependence on mechanical stress, modul... » read more

Metrics And Methodology for Hardware Security Constructs (NIST)
By Technical Paper Link - 09 Jun, 2025 - Comments: 0

A new technical paper titled "Metrics and Methodology for Hardware Security Constructs" was published by NIST. Abstract "Although hardware is commonly believed to be security-resilient, it is often susceptible to vulnerabilities arising from design and implementation flaws. These flaws have the potential to jeopardize not only the hardware's security, but also its operations and critical us... » read more

PCM-Based IMC Technology: Overview Of Materials, Device Physics, Design and Fabrication (IBM Research-Europe)
By Technical Paper Link - 09 Jun, 2025 - Comments: 0

A new technical paper titled "Phase-Change Memory for In-Memory Computing" was published by researchers at IBM Research-Europe. "We review the current state of phase-change materials, PCM device physics, and the design and fabrication of PCM-based IMC chips. We also provide an overview of the application landscape and offer insights into future developments," states the paper. Find the te... » read more

Big Changes In Medical Electronics
By Ed Sperling - 09 Jun, 2025 - Comments: 0

Medical devices are becoming more capable, more complicated, and more deployable in the field rather than in a hospital or a doctor's office. But getting these purpose-built devices into the hands of consumers requires a whole bunch of new challenges, from safeguarding fragile on-board chemistries that can be destroyed by existing chip manufacturing and packaging processes to ensuring the mater... » read more

Vertically Stacked ZnO/Te CFETs (POSTECH, Mokpo)
By Technical Paper Link - 09 Jun, 2025 - Comments: 0

A new technical paper titled "Demonstration of Vertically Stacked ZnO/Te Complementary Field-Effect Transistor" was published by researchers at POSTECH and Mokpo National University. Abstract "The complementary field-effect transistor (CFET) structure is a highly area-efficient technology. However, their fabrication entails highly complex integration processes using wafer transfer or recr... » read more

Research Bits: June 9
By Jesse Allen - 09 Jun, 2025 - Comments: 0

InGaOx GAA transistor Researchers from the University of Tokyo created a gate-all-around transistor made from gallium-doped indium oxide (InGaOx). Doping indium oxide with gallium suppressed oxygen vacancies, improving transistor reliability. "We wanted our crystalline oxide transistor to feature a 'gate-all-around' structure, whereby the gate, which turns the current on or off, surrounds t... » read more

Chip Industry Technical Paper Roundup: June 9
By Linda Christensen - 09 Jun, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=438 /] Find more semiconductor research papers here. » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy