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Place And Route Made Easier And Faster
By Mentor, a Siemens Business - 12 Sep, 2019 - Comments: 0

By Allan Crone A predictable trend in IC design is the ever-increasing size and complexity of designs while keeping the time allocated for the projects the same or shorter. Along with the tape-out pressure, organizations need to find cost savings everywhere possible. Lowering the overall cost of ownership of EDA tools is a viable way to manage the design budget. Consequently, design teams ar... » read more

Writing Reusable UPF For RTL And Gate-Level Low Power Verification
By Durgesh Prasad - 08 Aug, 2019 - Comments: 0

By Durgesh Prasad, Jitesh Bansal and Madhur Bhargava The Unified Power Format (UPF) is used to specify the power intent of a design. Once written, the UPF file is applied at every stage of the design cycle — starting with the RTL, then the gate-level, and finally during place and route. A major problem is that the UPF needs to be refined or modified at every stage to keep it compatible ... » read more

Empowering UPF Commands With Effective Elements Lists
By Progyna Khondkar - 16 Jul, 2019 - Comments: 0

The Unified Power Format (UPF) is intended for power management, power aware verification, and low power implementation. The more we explore the inherent features of UPF commands and options, and comprehend their interrelation, the more we become accurate, productive, and consistent in developing UPF for our intended purposes. Although the UPF is very well defined through the IEEE 1801 LRM, ... » read more

Speed Up P2P Resistance Debugging With Selective Highlighting
By Slava Zhuchenya - 13 Jun, 2019 - Comments: 0

Point-to-point (P2P) resistance simulation calculates the effective parasitic resistance from one or more specified points (sources) to another set of points (sinks) on an integrated circuit (IC) layout. The results of these simulations are a key component in the verification of the robustness and reliability of IC layout interconnect—designers must have this information to accurately perform... » read more

ASIC/IC Trends With A Focus On Factors Of Silicon Success
By Harry Foster - 09 May, 2019 - Comments: 0

“The more you know, the more you know you don't know.” ― Aristotle, 4th C. BC When Aristotle uttered this humble aphorism, he wasn’t telling us to throw up our hands and not bother with learning. He was encouraging us to continue digging deeper, to get answers and ask questions of those answers — that the thrills and rewards of study are truly without end. This is a big part of ou... » read more

The Weather Report: 2018 Study On IC/ASIC Verification Trends
By Harry Foster - 11 Apr, 2019 - Comments: 0

Nobel Laureate Bob Dylan observed, “You don’t need a weatherman to know which way the wind blows.” Similarly, we can get a feeling for where our industry is going by attending to the flow of thought at conferences, on line, or in our daily business. But that gives us only a small window to observe the hurricane-like forces of the very large and complicated, extremely dynamic global semico... » read more

Trends In FPGA Verification Effort And Adoption: The 2018 Wilson Research Group Functional Verification Study
By Harry Foster - 14 Mar, 2019 - Comments: 0

As contributors and pioneers in the digital revolution, we are often so busy creating and innovating that we are compelled to focus on the trees, never mind the forest. But as we are all aware, the more we know about the bigger picture, context, historical and projected trends, or simply how other people are doing the same thing, the more efficiently and successfully we can do our jobs. Prov... » read more

Automated Analog Design Constraint Checking
By Hossam Sarhan - 14 Feb, 2019 - Comments: 0

By Hossam Sarhan and Alexandre Arriordaz Overview Analog integrated circuits (ICs) are used to control and regulate conditions such as temperature, speed, sound, and electrical current. In analog ICs, voltage and current vary continuously at specified points in the circuit. One of the biggest challenges in analog integrated circuit (IC) design is to achieve and maintain accurate ratios: cap... » read more

Trends In FPGA Effectiveness: The 2018 Wilson Research Group Functional Verification Study
By Harry Foster - 17 Jan, 2019 - Comments: 0

We all know that knowledge is power. The adage holds true even in the prosaic case of making informed decisions backed by good data. Our hope and motivation in conducting the worldwide Wilson Research Group Functional Verification Study is to provide our community the information needed to make the best methodology and tool choices for their business and design goals. As well, we at Mentor, ... » read more

A New Approach To Resistance Extraction For Unconventional Geometries
By Hossam Sarhan - 13 Dec, 2018 - Comments: 0

Unconventional metal structures have begun popping up in integrated circuits (ICs) with increasing regularity, for a number of reasons. The growing demand for integrated cameras and image recognition capabilities has fueled the need for components such as high-quality CMOS image sensors with low noise, high dynamic range, and low power. Technology scaling has also contributed to an increase in ... » read more

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