Optimizing Your DRC Debug Can Reap Big Productivity Gains


Debugging design violations found by design rule checking (DRC) has always taken a significant share of the time needed to get a design to tapeout. And debug time only increases as the number and complexity of DRC expands with each new process node. Any steps you can take to make your DRC debug process more efficient directly improves your productivity. One technique for minimizing debug tim... » read more

Developing ASIL Ready SoCs For Self-Driving Cars


Artificial intelligence (AI) and deep learning using neural networks is a powerful technique for enabling advanced driver-assistance systems (ADAS) and greater autonomy in vehicles. As AI research moves rapidly, designers are facing tough competition to provide efficient, flexible, and scalable silicon and software to handle deep learning automotive applications like inferencing in embedded vis... » read more

Where The Rubber Hits The Road: Implementing Machine Learning On Silicon


Machine learning (ML) is everywhere these days. The common thread between advanced driver-assistance systems (ADAS) vision applications in our cars and the voice (and now facial) recognition applications in our phones is that ML algorithms are doing the heavy lifting, or more accurately, the inferencing. In fact, neural networks (NN) can even be used in application spaces such as file compressi... » read more

The Future Of Mobile PC Is Here


The smartphone has fundamentally changed the way other types of computing devices are being designed. Focus on energy-efficient compute, portable form factor, long battery life, and connectivity has spread far wider than just the smartphone in your hand. Nowhere has this design influence been more significant than in the area of notebook PC. The era we are just now entering is that of th... » read more

IP Electromagnetic Crosstalk Requires Contextual Signoff


By Magdy Abadir and Anand Raman Continuous advancement in technology scaling is enabling the emergence of high-performance application markets such as artificial intelligence, autonomous cars and 5G communication. These electronic systems operate at multi-GHz speed, while consuming the lowest amount of power possible leaving very little margin for error. Chips in these systems are highly in... » read more

Aging Models: The Basis For Predicting Circuit Reliability


Today, many products are based on high-performance electronic systems and integrated circuits (ICs), and the importance of these elements is ever-increasing. A certain tension arises here as these applications often call for a large amount of processing power and reliability. The processing power can best be supplied with highly scaled semiconductor technologies. However, these manufacturing te... » read more

Power-Aware Intent And Structural Verification Of Low-Power Designs


In Part 1 of this series on power aware (PA) verification, we examined the foundations and verification features of PA static checks. In Part 2, we will discuss the features of the static verification library and describe best static verification practices. Library for Static Verifications Cell-level and pin-level attributes from Liberty are mandatorily required for accurate PA-Static verif... » read more

Navigating The Foggy Edge Of Computing


The National Institute of Standards and Technology (NIST) defines fog computing as a horizontal, physical or virtual resource paradigm that resides between smart end-devices and traditional cloud or data centers. This model supports vertically-isolated, latency-sensitive applications by providing ubiquitous, scalable, layered, federated and distributed computing, storage and network connecti... » read more

AI Signals A New Change Of Perspective


A very long time ago, I was a student at MIT, programming with card decks in APL on IBM mainframes and studying AI in a class from Patrick Winston (who took over MIT’s AI lab from the legendary Marvin Minsky). I kept the text book as a reminder of where the world would go. Over four titanic shifts, mainframes/card decks became VAX/VT100, thence to IBM PCs and PC clients tied by Ethernet to co... » read more

Supply Monitoring On 28nm & FinFET: The Challenges Posed


A Q&A with Moortec CTO Oliver King. What are the issues with supplies on advanced nodes? The supplies have been coming down, quicker than the threshold voltages which has led to less supply margin. In addition to this, the interconnects are becoming thinner and closer together, which is pushing up resistance and also capacitance. What is the effect of these issues? In short, it... » read more

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