Virtual System Development Platforms For Safeguarding Complex Microelectronic Systems


Electronic systems are rapidly becoming more complex. This impacts almost all domains in which electronics are used today — especially industrial applications, medical engineering, communications engineering and, of course, automotive applications. What's changed is the addition of huge numbers of sensors and actuators that interact with the environment, the local integration of highly co... » read more

GDDR6 Pushes The Memory Envelope For AI And ADAS


Memory bandwidth is an ever-increasing critical bottleneck for a wide range of use cases and applications. These include artificial intelligence (AI), machine learning (ML), advanced driver-assistance systems (ADAS), as well as 5G wireless and wireline infrastructure. In addition to memory bottlenecks, the above-mentioned use cases and applications are rapidly hitting the real-world limits of t... » read more

Three Steps To Complete Reset Behavior Verification


By Chris Kwok, Priya Viswanathan, and Ping Yeung Reset architectures are notoriously complex and difficult to verify. Today’s SoCs contain highly complex reset distributions and synchronization circuitry. Often, reset trees can be larger than clock trees and have many of the same potential issues. Verifying that a design can be correctly reset under all modes of operation presents signi... » read more

Implementing Low-Power Machine Learning In Smart IoT Applications


By Pieter van der Wolf and Dmitry Zakharov Increasingly, machine learning (ML) is being used to build devices with advanced functionalities. These devices apply machine learning technology that has been trained to recognize certain complex patterns from data captured by one or more sensors, such as voice commands captured by a microphone, and then performs an appropriate action. For example,... » read more

Scalable Platforms For Evolving AI


Wear and tear on big, heavy vehicles such as trains can cause unexpected delays and repairs, not to mention create safety hazards that can go unnoticed for months until they become critical. In the past, maintenance teams personally examined the undercarriage of a locomotive to look for stress cracks and other anomalies. Later, imaging and sonar technologies were introduced to find what the hum... » read more

Finding Hotspots In AI Chips


Things are getting far more complicated as we move down to 7nm & 5nm but the tolerances of some of the physical effects that we have been measuring in the past are much tighter than they were at the older nodes. How do we track all that? What we see is that as we descend through the advanced nodes, say from 16nm down to 12nm, 7nm and more recently 5nm, we see that gate density starts to ... » read more

Building Access Control With Free Topology


For facilities managers of large buildings and campuses, security and access control are huge challenges. Authorized persons come and go so privileges must be granted and revoked; different employees, students and visitors may all have different levels of privilege/access; the access cards themselves must be authenticated; and the list goes on. This is in the face of ever-escalating security th... » read more

Accelerating Chiplets With 112G XSR SerDes PHYs


The fading of Moore’s Law and an almost exponential increase in data is challenging the semiconductor industry as never before. Indeed, zettabytes of data are constantly generated by a wide range of devices including IoT endpoints such as vehicles, wearables, smartphones and appliances. Moreover, sophisticated artificial intelligence (AI) and machine learning (ML) applications are adding new ... » read more

Seeing Is Believing: Visualizing Full Coverage Closure In Low-Power Designs


By Madhur Bhargava and Durgesh Prasad Lowering the power consumption and leakage in SoCs and other electrical designs has become a paramount concern in recent years. The reasons for this are many and well understood. The structures and techniques we use to accomplish this have made verification of so called low-power designs more complex and difficult than it is for designs where power usage... » read more

Shift Left Power-Aware Static Verification


Next-generation SoCs with advanced graphics, computing, machine learning (ML) and artificial intelligence (AI) capabilities are posing new unseen challenges in Low Power Verification. These techniques can introduce critical bugs into a design, especially when the power-management infrastructure interacts with signals that cross clock or reset domains. This can create additional clock-domain cro... » read more

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