Optimizing New Interconnect Technologies To Support Next-Generation Semiconductor Devices


Interconnects are the wiring system that connect together the components of a semiconductor device and permit these components to work together. One of the key metrics of any semiconductor interconnect scheme is the metal pitch size. Metal pitch is the minimum distance between the centers of two horizontal interconnects in a semiconductor. It's a key metric used to measure the progress of chip ... » read more

Laser Ablation Dicing Revolutionizes Ultra-Thin Wafer Saws Beyond The Capability Of Blade Dicing


The demand for consistently high electrical performance in the power discrete semiconductor market has driven component developers to continuously enhance semiconductor assembly packaging technology through advanced package design and wafer fabrication methods. Among the cost-effective approaches are increasing the die area size and decreasing the die thickness, which minimize electrical resist... » read more

TCAD Simulation Challenges For Gate-All-Around Transistors


By Victor Moroz and Shela Aboud The transition from finFET technology to Gate-All-Around (GAA) technology helps to reduce transistor variability and resume channel length scaling. It also brings several new challenges in terms of transistor design that need to be addressed. One of the challenges is handling the thin Si layers that come with GAA technology, where Si channel thickness scale... » read more

Do More With Less In Semiconductor Manufacturing


The recent resolution of labor disputes sheds light on a universal concern: the balance between automation and workforce dynamics. These situations mirror a challenge faced in semiconductor manufacturing—embracing AI without displacing the people driving the industry. Moving beyond automation fears US port workers expressed concerns about automation technologies, such as autonomous cranes a... » read more

Accelerating The AI Economy Through Heterogeneous Integration


The world is rapidly transitioning from an internet economy to an AI economy. In the internet economy, we stayed constantly connected to the internet 24/7 through our smartphones, PCs, and IoT devices. However, in the AI economy, every aspect of our lives is interwoven with artificial intelligence. You may already be familiar with AI tools such as ChatGPT or Google Gemini, which answer question... » read more

EU Chips Act: A Game Changer For The Digital Economy


The global semiconductor landscape has undergone significant transformation in recent years. With disruptions such as the semiconductor supply chain crisis and the challenges it posed to the automotive sector, Europe’s dependence on external fabrication facilities, particularly in Taiwan, has become a pressing concern. In response, the European Union (EU) introduced the EU Chips Act, a compre... » read more

Takeaways From The 2024 SPIE Photomask Technology + EUV Conference


In the autumn, I had the opportunity to attend the 2024 SPIE Photomask Technology and EUV Lithography conferences, collectively referred to as PUV or sometimes BACUS, the latter a reference to the event’s early association with the BACUS organization. This is a key annual event that brings together experts and professionals in photomask technology and EUV lithography. This year’s conference... » read more

Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification


In recent years there has been a sharp rise of multi-die system designs. Numerous publications targeting a large variety of applications exist in the public domain. One presentation [2] on the IEEE’s website does a good job of detailing the anecdotal path of multi-die systems by way of chiplet building blocks integrated within a single package [2]. The presentation includes references to a ha... » read more

Using Dummy Patterning To Solve Etch Uniformity Problems


Semiconductor devices are made up of hundreds of thin layers of materials stacked by multiple deposition and etch processes. Process engineers need to design the best combination of deposition and etch processes to ensure uniformity across an entire chip area and across the silicon wafer. Uniformity is the most common and critical parameter that is monitored in semiconductor fabrication, especi... » read more

Luminary Panel Sees Progress In EUV Pellicle Adoption As Critical For EUV


A significant focus of the 2024 SPIE Photomask and EUV conference was on EUV lithography and high-numerical-aperture (high-NA) EUV lithography, offering the potential to drive resolution to new heights. These EUV solutions bring new challenges such as pellicles, mask inspection, and smaller and smaller minimum mask dimensions. Progress has been impressive, according to lithography luminary Dr. ... » read more

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