category: Blogs – MD

category: IoT, Security & Automotive

Case Studies In Double-Patterning Debug
By David Abercrombie - 18 Jun, 2015 - Comments: 0

Double patterning (DP) impacts just about every part of the design and manufacturing flows. However, the kinds of issues you encounter, the way they manifest themselves, and the ideal way to address them may be very different in different parts of these flows. I feel like I have spent a lot of time the last six months or so working with place and route (P&R) and chip finishing engineers on DP i... » read more

Japan: Finding Leadership In New Technology Areas
By SEMI - 18 Jun, 2015 - Comments: 0

By Osamu Nakamura The semiconductor industry is a technology-driven industry — and technology invention and innovation are the engines that drive industry growth. Japan has seen the global landscape for semiconductor manufacturing change, and in turn, Japan’s semiconductor industry has been changing, finding technology leadership opportunities in emerging technology areas that lead to grow... » read more

Fab Tool M&A Slowdown?
By Mark LaPedus - 18 Jun, 2015 - Comments: 0

The semiconductor industry is in the midst of a dizzying array of mergers and acquisitions. At the current pace, some 32% of all U.S. publicly traded semiconductor companies are projected to get acquired in 2015, according to FBR. But in reality, the M&A activity will slow and edge towards a 15% consolidation rate for the year, according to the firm. Still, the IC industry is bracing for... » read more

The Future Is Flexible
By Max McDaniel - 18 Jun, 2015 - Comments: 0

For the next installment in my display survey series, I will focus on advanced display technologies coming down the pipeline and how materials engineering solutions will enable tomorrow’s TVs and mobile devices to be flexible, bendable and foldable. [caption id="attachment_20529" align="alignnone" width="438"] Source: Samsung[/caption] I touched on this topic at the recent SID Display W... » read more

New Approaches To Imaging For Both Large And Small
By Michael Watts - 08 Jun, 2015 - Comments: 0

Imaging is the common theme for everything at Photonics West this year, and two new ideas caught my attention—a near field very small microscope and a new way of collecting images that separates reflected light from indirect light. IMEC has presented papers about its near field microscope before. This year the research house has reduced it to a product. The idea is to illuminate a object w... » read more

IoT Requires The Evolution Of The “New” 200mm Fab
By SEMI - 01 Jun, 2015 - Comments: 0

By Bill Martin & Paul Werbaneth In April, we all celebrated the 50th anniversary of Moore’s Law. While critical for the industry, sometimes “chasing-the-latest-technology” business model is not the answer. Sometimes veering away from Moore’s Law makes more sense and is a better alternative. But, ever since the 1970’s, many product developer minds were conditioned that smaller w... » read more

10nm Fab Watch
By Mark LaPedus - 21 May, 2015 - Comments: 1

When will the 10nm logic node happen? Analysts believe that foundry vendors will move into 10nm finFET volume production around 2017. Still others say the 10nm finFET ramp could take place anywhere from 2018 to 2020. The predictions are all over the map. One way to predict the timing, progress and demand for 10nm is simple: Follow the fabs. In fact, Intel, Samsung, TSMC and GlobalFound... » read more

Next-Gen Metrology: Searching For A Bright X-Ray Source
By SEMI - 21 May, 2015 - Comments: 0

By Debra Vogler Metrology for semiconductor applications is a broad topic regardless of whether one is talking about front-end-of-line (FEOL) or back-end-of-line (BEOL) technologies. Benjamin Bunday, project manager, CD Metrology and senior member of the technical staff at SEMATECH, broke down the topic of next-generation metrology at 10nm and below into four main categories for SEMI: • I... » read more

Automated Chip Polishing Can Make Your Design Shine
By Bill Graupp - 21 May, 2015 - Comments: 1

Today’s modern chip design is a collaboration among many design teams, often using different design flows and different EDA tools. This state of the chip design industry can create high risk in the layout process, forcing delays in product release. To help reduce this risk, many levels of verification throughout the design flow exist to identify problematic areas in a design. While new EDA to... » read more

Reticle Inspection And Metrology
By Zain Saidin - 21 May, 2015 - Comments: 0

Pattern defects and contamination on a reticle can cause yield issues in every die of every wafer printed. We take it for granted today, but it started out with people looking through a microscope and manually scrolling back and forth looking for defects on photomasks that originally were hand cut, and later on made by machines. Fast forward to the present and we're able to find the equivale... » read more

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