Completing The Silicon Lifecycle Management Puzzle


The year 2020 will be remembered for many reasons. The global pandemic, the political struggles and the extreme weather will occupy our thoughts for many years. There was another event that occurred in 2020 that will also be remembered in a smaller, but very important portion of the world. It’s the year that Synopsys acquired Moortec to complete the silicon lifecycle management (SLM) puzzle. ... » read more

Picking The Right Location For Probe Stations


High performance flicker noise or phase noise TestCells can be degraded by installing them in a bad location. And just like developing a high-performance system, finding a good location can be a time consuming and difficult task for the typical lab technician that is tasked with setting up the new prober. To do it right requires specialized measurement equipment and tools such as accelerometers... » read more

Making IC Test Faster And More Accessible: Part 2


Recently, my colleague Robert Ruiz described a new approach to scan test that utilizes the high-speed I/O (HSIO) ports that exist on most chips. The benefits of this new approach include reduced test time and cost thanks to the high-speed interface. Simplified pin electronics and tester setup are also benefits, as is the ability to run manufacturing tests in the field in support of silicon life... » read more

High Throughput Noise Measurements


Flicker noise and random telegraph noise (RTN) testing can take a long time, especially when measuring down to frequencies of 1 Hz or below. Sweep times up to 30 min at a single temperature are common. And standard data collection for device models requires DUT data at multiple temperatures on small pads. To lower Cost of Test (CoT), and significantly increase on-wafer test throughput, a... » read more

Benefits Of Outsourcing Yield Management Software


Microchip is a longtime yieldHUB customer. We work with a number of divisions worldwide. We spoke to Kasia Metlička-Sawicka, an Engineering Release Supervisor, Senior Engineer II-Product in Microchip Ireland to find out why she likes using our system. What do you do? I’m an Engineering Release supervisor/Senior Product Engineer. I oversee the engineering release group of technicians... » read more

Making IC Test Faster And More Accessible: Part 1


The fundamental challenges of IC test have been the same for a long time. At the heart of all test strategies is controllability and observability. First, control the state of the chip with known test vectors and then observe the chip to determine if it exhibits good or faulty behavior. There have been many innovations over the years to make the required testing of chips more tractable. Thanks ... » read more

From Design To Deployment: How Silicon Lifecycle Management Optimizes The Entire IC Life Span


The beginning of the IC journey gets most of the attention in the semiconductor world – the challenges of design, test and manufacturing. But the reality is the entire lifecycle of a chip needs attention, requiring ways to ensure a chip’s intended and ongoing operation, especially in ever-changing operating environments where chips ultimately reside. The growing complexity of today’s e... » read more

Eliminating Ground-Loop Induced Noise


As semiconductor device performance increases, especially for low power and higher speed ICs, testing low frequency 1/f, RTN and phase noise with improved signal-to-noise ratio is required. Finding and eliminating unwanted noise is required in multiple areas. Noise sources can be found inside a prober, outside a prober, and in a measurement TestCell. Historically, TestCell-generated noise was o... » read more

Key Aspects Of Yield Management Systems For Fabless Startups


Do you work for a fabless start-up? Are you ramping up? If so, you need data-analysis tools for your production data. You will struggle without them. You have two options for yield management analysis. You may decide to hire an engineer (or team of engineers) whose job is to transfer the data from datalogs to a spreadsheet, then generate reports. Or, you could invest in a system that takes c... » read more

Early And Fine Virtual Binning


Not all chips are created equal, and this is viewed as both a blessing and a curse by semiconductor makers. On one hand, chips can be screened for certain attributes, and some of the chips can be sold for higher prices than others. On the other hand, variations in the production process cause silicon performance to greatly differ, leaving chip makers with a wide and somewhat unpredictable distr... » read more

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