category: Blogs – SLD

category: IoT, Security & Automotive

Top 5 Reasons The SoC Interconnect Matters
By Kurt Shuler - 29 Oct, 2015 - Comments: 0

The on-chip interconnect is the one area of SoC design that still does not receive the priority that it deserves. It’s like Rodney Dangerfield: It gets no respect. However, that is changing because of rising chip complexity, smaller process dimensions, and acknowledgement of the fact that in a world where design teams commercially license most of the chip’s critical semiconductor IP (like C... » read more

Technology Reboot Required
By Brian Bailey - 29 Oct, 2015 - Comments: 1

The International Technology Roadmap for Semiconductors (ITRS) has produced reports outlining the major obstacles the electronics industry faces for a long time now. It attempts to project, with a 15-year horizon, the problems that need to be solved in order to take advantage of the complete design and manufacturing ecosystem. From this, early research efforts can be started. This enabled the E... » read more

You Can’t Walk Straight Blindfolded
By Tom De Schutter - 29 Oct, 2015 - Comments: 0

Let’s examine the first part of the title of this blog. It is stated as a given. But is it true that you really can’t walk straight when blindfolded? That is what my children and I set out to investigate one sunny afternoon in October (yes we live in California). We looked for a nice open field with little to no surrounding sound, so that you cannot use the sound to set your bearing. We ... » read more

NoC Versus PIN: Size Matters
By Drew Wingard - 09 Oct, 2015 - Comments: 1

Since I first helped introduce the concept of applying networking techniques to address SoC integration challenges in 2007, I have been asked many hundreds of times how to determine when and where to best use an on-chip network (NoC) instead of a passive interconnect network (PIN)? Is there a minimum number of initiators and targets below which it makes more sense to use a PIN for the SoC archi... » read more

Pick A Number
By Ed Sperling - 24 Sep, 2015 - Comments: 0

For the past two years there was some mumbling that 16/14nm would be short-lived, and that 10nm would be the place that foundries would invest heavily. Now the buzz is that 10nm may be skipped entirely and the next node will be 7nm. After all, 10nm is really only a half-node. Or is it? The answer depends on who's defining 10nm. The 16/14nm node is based on a 20nm back-end-of-line process, un... » read more

Wearable Devices: A Limitless Future
By Warren Kurisu - 24 Sep, 2015 - Comments: 0

Today, there are many wearable systems across industries including medical and health care, safety, smartwatches, smart goggles and glasses, smart shoes and clothing — even smart pet trackers! So why is there such a proliferation of devices, even though many of these portable/embedded devices have been around for decades? There are a few key technical trends enabling these devices. F... » read more

ISO 26262: Top 3 Reasons For Hardware Implementation Of Functional Safety
By Kurt Shuler - 24 Sep, 2015 - Comments: 0

I’ve written articles before about ISO 26262 Certification because many SoC design teams are challenged by the barriers they have to overcome to achieve automotive functional safety, especially if they previously enjoyed success in mobility or computing but now want to shift attention to the growing array of electronics used in transportation such as automated driver assistance systems (ADAS)... » read more

A Word About FPGA-Based Prototyping
By Tom De Schutter - 24 Sep, 2015 - Comments: 0

With software now driving the main capabilities of embedded devices, prototyping has taken the spotlight in SoC design. This is turning a once-hardware-centric electronics supply chain upside down. To cope with this new reality, companies are embracing both virtual and physical prototyping technologies. Physical prototyping, also known as FPGA-based prototyping, is an important piece of an e... » read more

Don’t Forget To Consider Productivity In Semiconductor IP Evaluations
By Randy Smith - 24 Sep, 2015 - Comments: 0

When companies consider purchasing Semiconductor IP (SIP), they often have a strict procedure for evaluating third-party vendors and their products. If they don’t have a set way of evaluating IP, the Global Semiconductor Alliance (GSA) has developed a Hard IP Licensing Risk Assessment Tool to aid in assessing the value of IP (there is also a quality assessment tool). This aid is part of the G... » read more

The Next Level Of Abstraction For System Design
By Frank Schirrmeister - 24 Sep, 2015 - Comments: 1

Recently there have been a lot of discussions again about the next level of design abstraction for chip design. Are we there yet? Will we ever get there? Is it SystemC? UML/SysML perhaps? I am taking the approach of simply claiming victory: Over the last 20 years we have moved up beyond RTL in various areas—just in a fragmented way. However, the human limitations on our capacity for processin... » read more

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