category: Low Power-High Performance

category: IoT, Security & Automotive

Research Bits: September 11
By Jesse Allen - 11 Sep, 2023 - Comments: 0

Combining digital and analog Researchers from École Polytechnique Fédérale de Lausanne (EPFL) propose integrating 2D semiconductors with ferroelectric materials for joint digital and analog information processing, which could improve energy efficiency and support new functionality. The device uses a 2D negative-capacitance tungsten diselenide/tin diselenide tunnel FET (TFET), which consu... » read more

Sweeping Changes For Leading-Edge Chip Architectures
By Ed Sperling - 08 Sep, 2023 - Comments: 0

Chipmakers are utilizing both evolutionary and revolutionary technologies to achieve orders of magnitude improvements in performance at the same or lower power, signaling a fundamental shift from manufacturing-driven designs to those driven by semiconductor architects. In the past, most chips contained one or two leading-edge technologies, mostly to keep pace with the expected improvements i... » read more

Chip Industry Week In Review
By The SE Staff - 08 Sep, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman Global semiconductor equipment billings dipped 2% year-over-year to US$25.8 billion in Q2, and slipped 4% compared with Q1, according to SEMI. Similarly, the top 10 semiconductor foundries reported a 1.1% quarterly-over-quarter revenue decline in Q2. A rebound is anticipated in Q3, according to TrendForce. Synopsys extended its AI-driven EDA ... » read more

Research Bits: September 5
By Jesse Allen - 05 Sep, 2023 - Comments: 0

Layered TMD semiconductors Scientists from Tsinghua University investigated fabrication techniques for fabricating and engineering transition metal dichalcogenides (TMDs). By modulating TMDs with various methods, including phase engineering, defect engineering, doping, and alloying, the material class could provide a wide range of alternatives for high-quality layered semiconductors with st... » read more

Week In Review: Design, Low Power
By Susan Rambo - 01 Sep, 2023 - Comments: 0

Design & IP Arm launched the Neoverse Compute Subsystems (CSS), pre-integrated and validated configurations of Arm Neoverse platform IP, at this week's Hot Chips conference. CSS helps streamline SoC designs for data centers and is optimized for an advanced 5nm process. The first generation of CSS (Neoverse CSS N2) is based on Arm’s Neoverse N2 platform. Core count is configurable (24 to ... » read more

Research Bits: August 29
By Jesse Allen - 29 Aug, 2023 - Comments: 0

Resistive switching with hafnium oxide Researchers from the University of Cambridge, Purdue University, University College London, Los Alamos National Laboratory, and University at Buffalo used hafnium oxide to build a resistive switching memory device that processes data in a similar way as the synapses in the human brain. At the atomic level, hafnium oxide has no structure, with the hafni... » read more

Research Bits: August 22
By Jesse Allen - 22 Aug, 2023 - Comments: 0

Photonic memory Researchers from Zhejiang University, Westlake University, and the Chinese Academy of Sciences developed a 5-bit photonic memory capable of fast volatile modulation and proposed a solution for a nonvolatile photonic network supporting rapid training. This was made possible by integrating the low-loss phase-change material (PCM) antimonite (Sb2S3) into a silicon photonic plat... » read more

Week In Review: Design, Low Power
By Susan Rambo - 18 Aug, 2023 - Comments: 0

Synopsys’ board of directors appointed Sassine Ghazi as president and chief executive officer effective on Jan. 1, 2024. Ghazi, who is currently the COO, will succeed Aart de Geus, co-founder, chair, and CEO of Synopsys, who will then become the executive chair of board of directors. IBM Research introduced  an energy-efficient mixed-signal analog AI chip for DNN inferencing and demonstra... » read more

Research Bits: August 15
By Jesse Allen - 15 Aug, 2023 - Comments: 0

Using noise for spintronics Researchers from the Institute for Basic Science built a vertical magnetic tunneling junction device by sandwiching a few layers of vanadium in tungsten diselenide (V-WSe2), a magnetic material, between top and bottom graphene electrodes to create high-amplitude Random Telegraph Noise (RTN) signals. Through the resistance measurement experiments using these devic... » read more

Processor Tradeoffs For AI Workloads
By Ann Mutschler - 10 Aug, 2023 - Comments: 0

AI is forcing fundamental shifts in chips used in data centers and in the tools used to design them, but it also is creating gaps between the speed at which that technology advances and the demands from customers. These shifts started gradually, but they have accelerated and multiplied over the past year with the rollout of ChatGPT and other large language models. There is suddenly much more... » read more

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