SRAM In AI: The Future Of Memory


Experts at the Table — Part 1: Semiconductor Engineering sat down to talk about AI and the latest issues in SRAM with Tony Chan Carusone, CTO at Alphawave Semi; Steve Roddy, chief marketing officer at Quadric; and Jongsin Yun, memory technologist at Siemens EDA. What follows are excerpts of that conversation. Part two of this conversation can be found here and part three is here. [L-R]: ... » read more

Reduce Data Center Over-Provisioning And Stranded Capacity For Sustainability


In the ever-evolving landscape of data centers, the issue of stranded capacity has become a significant concern for operators. Stranded capacity refers to the underutilization of resources. It is best referred to as the elephant in the data center due to the enormity of its impact. The losses are even more significant for the enterprise data center categories at above 40%. This outcome n... » read more

The Power Of HBM3 Memory For AI Training Hardware


AI training data sets are constantly growing, driving the need for hardware accelerators capable of handling terabyte-scale bandwidth. Among the array of memory technologies available, High Bandwidth Memory (HBM) has emerged as the memory of choice for AI training hardware, with the most recent generation, HBM3, delivering unrivaled memory bandwidth. Let’s take a closer look at this important... » read more

RTL Optimization Best Practices Help To Achieve Power Goals And Identify Reliability Issues Earlier


Designers face enormous challenges for low-power designs. Whether it is IoT at the edge, AI in the datacenter, robotics or ADAS, the demand for increased functionality and higher performance in SoCs is rapidly stretching power budgets to their breaking point. Power must be considered at every stage of chip design. Waiting to address power until late in the design cycle – post-netlist or durin... » read more

Placement And CTS Techniques For High-Performance Computing Designs


This paper discusses the challenges of designing high-performance computing (HPC) integrated circuits (ICs) to achieve maximum performance. The design process for HPC ICs has become more complex with each new process technology, requiring new architectures and transistors. We highlight how the Siemens Aprisa digital implementation solution can solve placement and clock tree challenges in HPC de... » read more

Can Software Testing Deliver ROI?


Innovation happens at a lightning pace, where software applications must follow suit or risk obsolescence. Consequently, quality assurance (QA) teams face a constant battle to ensure functionality, quality, and speed of release for their digital products. Software testing is critical to deliver in the face of this ever-increasing pressure. However, it is often seen as a burden, a cost center th... » read more

Placement And CTS Techniques For High-Performance Computing Designs


This paper discusses the challenges of designing high-performance computing (HPC) integrated circuits (ICs) to achieve maximum performance. The design process for HPC ICs has become more complex with each new process technology, requiring new architectures and transistors. We highlight how the Siemens Aprisa digital implementation solution can solve placement and clock tree challenges in HPC de... » read more

Startup Funding: October 2023


Investors are betting heavily on data center technology, with October funding going to companies developing data processing units (DPUs) to accelerate a variety of tasks, a near-memory distributed dataflow architecture for AI, and liquid cooling technology. Much of this is linked to the build-out of the edge, closer to the source of the data than the cloud but not as compute-intensive. Other ... » read more

3D Heterogenous Integration: Design And Verification Challenges


Next-generation semiconductor products increasingly rely on vertical integration technologies to drive system density, speed, and yield improvement. Due to the increased coupling effects across multiple physics, co-simulation and co-analysis of these phenomena are critical for a robust chip-package-system design. Advanced 2.5D/3D-IC systems are constructed with multiple dice, interposers, packa... » read more

Vision Transformers Change The AI Acceleration Rules


Transformers were first introduced by the team at Google Brain in 2017 in their paper, "Attention is All You Need". Since their introduction, transformers have inspired a flurry of investment and research which have produced some of the most impactful model architectures and AI products to-date, including ChatGPT which is an acronym for Chat Generative Pre-trained Transformer. Transformers a... » read more

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