category: Low Power-High Performance

category: IoT, Security & Automotive

The When, Why, And How Of Waiting And Backoff In Multi-Threaded Applications On Arm
By Ola Liljedahl - 16 Jan, 2025 - Comments: 0

With multithreaded applications, there are situations where it is unavoidable or desirable to wait for other threads. Implementing such wait instruction sequences correctly is important for both multithreaded scalability and power efficiency. Scalability is measured both in terms of aggregated throughput and fairness. Fairness is when all contending threads get an equal share of the contended ... » read more

Is Liquid Cooling The Future Of Your Data Center?
By Veena Parthan - 16 Jan, 2025 - Comments: 0

The data center industry is facing unprecedented challenges. With chip densities skyrocketing, high-performance computing is being pushed to its limits, all while energy costs are soaring and environmental concerns are escalating. Securing approvals for new data center facilities has become more complex, often plagued by community objections and grid supply issues. However, amidst these hurd... » read more

Power Budgets Optimized By Managing Glitch Power
By Adam Kovac - 16 Jan, 2025 - Comments: 0

“Waste not, want not,” says the old adage, and in general, that’s good advice to live by. But in the realm of chip design, wasting power is a fact of physics. Glitch power – power that gets expended due to delays in gates and/or wires – can account for up to 40% of the power budget in advanced applications like data center servers. Even in less high-powered circuits, such as those fou... » read more

Tame IR Drop Like Google
By Jeff Wilson - 16 Jan, 2025 - Comments: 0

In the relentless pursuit of semiconductor performance and efficiency, tech giants like Google are constantly pushing the boundaries of what's possible. As they scale their designs to the cutting-edge 3nm node, power integrity has emerged as a critical challenge that must be overcome. Enter Calibre DesignEnhancer (DE), Siemens' analysis-based solution for enhancing design reliability and man... » read more

2025: So Many Possibilities
By Brian Bailey - 16 Jan, 2025 - Comments: 0

The stage is set for a year of innovation in the chip industry, unlike anything seen for decades, but what makes this period of advancement truly unique is the need to focus on physics and real design skills. Planar scaling of SoCs enabled design and verification tools and methodologies to mature on a relatively linear path, but the last few years have created an environment for more radical... » read more

What’s The Best Way To Sell An Inference Engine?
By Bryon Moyer - 16 Jan, 2025 - Comments: 0

The burgeoning AI market has seen innumerable startups funded on the strength of their ideas about building faster, lower-power, and/or lower-cost AI inference engines. Part of the go-to-market dynamic has involved deciding whether to offer a chip or IP — with some newcomers pivoting between chip and IP implementations of their ideas. The fact that some companies choose to sell chips while... » read more

Achieving Successful Timing, Power, And Physical Signoff For Multi-Die Designs
By Synopsys - 15 Jan, 2025 - Comments: 0

Multi-die designs using 2.5D and 3D technologies are increasingly important for a wide range of electronics applications, including high-performance computing (HPC), artificial intelligence (AI), automotive, and mobile. The multi-die architecture enables designers to mix dies from different foundries and technology nodes, including existing dies from previous projects. The resulting density and... » read more

How Engineering Simulation Drives Impact for Sustainability
By Ansys - 15 Jan, 2025 - Comments: 0

For decades, engineering simulation has been the engineer’s Swiss Army knife for improving the speed and cost of developing new products as well as for bringing product performance to the next level. This report reveals that while simulation has already made a significant contribution to advancing sustainability, there is still so much potential to make an even greater impact. In the conte... » read more

How Google And Intel Use Calibre DesignEnhancer To Reduce IR Drop And Improve Reliability
By Siemens EDA - 15 Jan, 2025 - Comments: 0

In the fast-paced world of semiconductor design, achieving both Design Rule Check (DRC) clean layouts and optimal electrical performance is crucial for minimizing design iterations, reducing time-to-market and ensuring product reliability. This paper explores how the Calibre DesignEnhancer (DE) analysis-based, signoff-quality EMIR solution helps design teams meet these challenges by enhancing p... » read more

AI Won’t Replace Subject Matter Experts
By Adam Kovac - 15 Jan, 2025 - Comments: 0

Experts at The Table: The emergence of LLMs and other forms of AI has sent ripples through a number of industries, raising fears that many jobs could be on the chopping block, to be replaced by automation. Whether that’s the case in semiconductors, where machine learning has become an integral part of the design process, remains to be seen. Semiconductor Engineering sat down with a panel of e... » read more

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