LLE-Aware Design Methodology To Avoid Timing And Power Pessimism


As chips move to ever-finer geometries, the active region (diffusion) shapes of neighboring cells can impact timing analysis and power calculations for the entire design. The LLE (Local Layout Effect) impact must be measured, but the impact is reflected very conservatively using conventional approaches. This paper describes a LLE-aware design methodology that mitigates the conservatism of co... » read more

Extracting Parasitic Impedance Of Semiconductor Power Modules


As a key component in energy conversion system, power semiconductor devices are widely used in various applications, e.g., electric vehicles, renewable energy conversion, and uninterrupted power supplies. The trend for power converter design is always toward higher power density. Power modules that integrate multiple semiconductor devices can meet this demand. It also reduces the compl... » read more

Research Bits: Mar. 10


Incipient ferroelectricity Researchers from Penn State University and the University of Minnesota propose harnessing incipient ferroelectricity in multifunctional two-dimensional FETs to create neuromorphic computer memory. Materials with incipient ferroelectricity have no stable ferroelectric order at room temperature and need certain conditions to achieve an electrical charge. The FETs were ... » read more

Research Bits: Mar. 4


Fiber computer Researchers from Massachusetts Institute of Technology (MIT), Rhode Island School of Design, and Brown University developed a programmable elastic fiber computer that could be woven into clothing to monitor health conditions and physical activity. Clothing created using the fiber computer was reported as comfortable and machine washable. The single elastic fiber computer cont... » read more

What Scares Chip Engineers About Generative AI


Experts At The Table: LLMs and other generative AI programs are a long way away from being able to design entire chips on their own from scratch, but the emergence of the tech has still raised some genuine concerns. Semiconductor Engineering sat down with a panel of experts, which included Rod Metcalfe, product management group director at Cadence; Syrus Ziai, vice-president of engineering at E... » read more

Research Bits: Feb. 25


Recording synaptic connections Researchers from Harvard University built a silicon chip capable of recording synaptic signals from a large number of neurons and used it to catalogue more than 70,000 synaptic connections from about 2,000 rat neurons. They hope the device is a step in creating a detailed synaptic connection map of the brain. The chip contains an array of 4,096 microhole elect... » read more

Research Bits: Feb. 18


Predicting band gap with neural networks Researchers from Kyoto University developed a machine learning model to predict the band gap of novel semiconductor materials. Using data from almost 2,000 semiconductor materials, the team tested six different neural networks. They found that the incorporation of conditional generative adversarial networks (CGAN) and message passing neural networks ... » read more

Controlling Leakage Power


IC designers face a significant challenge in managing leakage power - a phenomenon that can profoundly impact your device's power, performance, area (PPA), and overall reliability. Leakage can occur in various ways, from parasitic leakage to analog gate leakage or digital gate leakage, and you must address these issues with great care, as even subtle circuit changes can lead to reliability prob... » read more

Vision Language Models Come Rushing In


Just when you thought the pace of change of AI models couldn’t get any faster, it accelerates yet again. In the popular news media, the introduction of DeepSeek in January 2025 created a moment that captured headlines in every newspaper and website heralding comparisons to the Sputnik moment of 1957. But rapid change is also happening in many quarters that are hidden from view of the Chat-App... » read more

Optimizing Data Center TCO With CXL And Compression


In the ever-evolving landscape of data centers, Total Cost of Ownership (TCO) remains a critical metric. It encompasses all costs associated with data center infrastructure throughout its lifecycle, including initial purchase, installation, utilization, maintenance, energy consumption, and eventual replacement. By understanding and optimizing TCO, hyperscalers can make informed decisions that e... » read more

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