category: Low Power-High Performance

category: Auto, Security & Edge AI

Research Bits: Mar. 9
By Jesse Allen - 09 Mar, 2026 - Comments: 0

Low noise clock generator Researchers from Ulsan National Institute of Science and Technology (UNIST) designed a low power semiconductor circuit capable of generating high-quality clock signals with significantly reduced noise levels. The injection-locked clock multiplier (ILCM) circuit uses a simplified design based on a ring voltage-controlled oscillator (VCO). It integrates a frequency t... » read more

Research Bits: Mar. 3
By Jesse Allen - 03 Mar, 2026 - Comments: 0

Computational electron microscopy Researchers from Cornell University, TSMC, and ASM used electron ptychography for atomic-scale defect inspection of transistors. The computational imaging method uses an extremely precise electron microscope pixel array detector (EMPAD) to collect detailed scattering patterns of electrons after they pass through transistors and compare how the patterns chan... » read more

Research Bits: Feb. 24
By Jesse Allen - 24 Feb, 2026 - Comments: 0

Growing patterned diamond Researchers from Rice University developed a bottom-up microwave plasma chemical vapor deposition method for growing patterned diamond surfaces that could help decrease operating temperatures in electronics by 23 degrees Celsius. The team used two techniques for controlling seed crystal placement. Photolithography was used for small, detailed patterns. To scale up ... » read more

New Performance Requirements For Audio
By Ed Sperling - 23 Feb, 2026 - Comments: 0

Demand for higher performance in audio is rising as human-machine interactions increase on the edge. That means more processing elements, and more challenges in keeping data consistent across those processors. Prakash Madhvapathy, director of product marketing and product management at Cadence, talks about the advantages of coherent designs, how that impacts security, and how DSPs are evolving ... » read more

The On-Device LLM Revolution
By Steve Roddy - 20 Feb, 2026 - Comments: 0

The AI world is experiencing a fundamental shift. After years of cloud-centric inference dominated by massive data center GPUs, we're witnessing an accelerating migration of language models to edge devices. These are not the trillion-parameter behemoths that require server farms, but the "Goldilocks zone" models: 3B to 30B parameters — large enough to deliver genuinely useful AI capabilities,... » read more

Research Bits: Feb. 17
By Jesse Allen - 17 Feb, 2026 - Comments: 0

Analog layout foundation model Researchers from Pohang University of Science and Technology (POSTECH) built a foundation model for automated analog circuit layout. The team used a self-supervised learning approach, in which the model learns without human-provided labels. To counter a lack of available training data, the team divided analog layouts into small patches, masked part of each lay... » read more

How Siemens Symphony Pro Enabled AnalogPort To Verify Complex Chip Interfaces
By Siemens EDA - 13 Feb, 2026 - Comments: 0

The semiconductor industry's shift toward chiplet-based architectures has created significant mixed-signal verification challenges for high-speed die-to-die interconnects. Traditional verification approaches force difficult trade-offs: Digital mixed-signal (DMS) flows sacrifice analog fidelity, while Analog mixed-signal (AMS) flows struggle with scalability and manual overhead. This paper detai... » read more

AI Inference Needs A Mix-And-Match Memory Strategy
By Raj Uppala - 12 Feb, 2026 - Comments: 0

AI inference is no longer a single workload that can be served efficiently by a single type of accelerator or memory. From fast chat replies to 10M token codebases, inference spans wildly diverse workloads with very different limits on latency, bandwidth, capacity, and compute, as the figure below demonstrates.1 Source: Meta1 The AI inference spectrum of workloads includes: Inter... » read more

Formal Verification Fundamentals Remain Non-Negotiable In The New Verification Revolution
By Nicolae Tusinschi - 12 Feb, 2026 - Comments: 0

The semiconductor industry stands at a critical juncture. First-time silicon success rates have reached all-time lows, while design complexity continues to grow exponentially. System-on-chip designs now integrate billions of transistors, multiple processor cores, complex memory hierarchies, and sophisticated interconnect fabrics. In this environment, the stakes for verification accuracy have ne... » read more

Chiplets And 3D-ICs Add New Electrical And Mechanical Challenges
By Ann Mutschler - 12 Feb, 2026 - Comments: 1

Key Takeaways • Chiplets and 3D-IC architectures add new thermal-mechanical stresses that can affect the reliability of entire systems. • As chiplets are assembled into packages, defectivity targets become more stringent for each component in a system. • Traditional silos are breaking down, forcing design teams to address issues such as materials choices that previously were handled by... » read more

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