Nicolae Tusinschi

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Nicolae Tusinschi is a product manager for formal verification solutions at Siemens EDA. His key projects have included integrating simulation coverage with formal results, leveraging coverage results in the verification process, and the formal verification of RISC-V designs. He holds a master's degree in embedded computing systems from Technische Universitat Kaiserslautern, Germany, and a bachelor's degree in industrial automation from Universitatea Dunarea de Jos din Galati, Romania.

Author's Latest Posts

Formal Verification Fundamentals Remain Non-Negotiable In The New Verification Revolution

By Nicolae Tusinschi - 12 Feb, 2026 - Comments: 0

The semiconductor industry stands at a critical juncture. First-time silicon success rates have reached all-time lows, while design complexity continues to grow exponentially. System-on-chip designs now integrate billions of transistors, multiple processor cores, complex memory hierarchies, and sophisticated interconnect fabrics. In this environment, the stakes for verification accuracy have ne... » read more

A Holistic View Of RISC-V Verification

By Nicolae Tusinschi - 07 Aug, 2019 - Comments: 0

Last month, we discussed the growth of the RISC-V open processor ecosystem, the two main organizations driving it, and the role that OneSpin plays. In addition, we have become very active in the RISC-V community and have more than a dozen technical articles published, conference talks presented, and upcoming talks accepted. We tend to focus on the challenges of verifying RISC-V IP cores and sys... » read more