Mini-Consortia Forming Around Chiplets

By Ed Sperling - 20 Mar, 2023 - Comments: 0

Mini-consortia for chiplets are sprouting up across the industry, driven by demands for increasing customization in tight market windows and fueled by combinations of hardened IP that have been proven in silicon. These loosely aligned partnerships are working to develop LEGO-like integration models for highly specific applications and end markets. But they all are starting small, because it'... » read more

Week In Review: Semiconductor Manufacturing, Test

By Gregory Haley - 17 Mar, 2023 - Comments: 0

Samsung announced plans to invest $230 billion (300 trillion won) over the next two decades to construct the world’s largest semiconductor manufacturing complex in South Korea’s Gyeonggi Province, reports AP. The complex will consist of five new semiconductor plants producing memory and logic chips. Chips will be the enabling engines, requiring massive investments in new technology, m... » read more

Tech Forecast: Fab Processes To Watch Through 2040

By Laura Peters - 16 Mar, 2023 - Comments: 0

The massive proliferation of semiconductors in more markets, and more applications within those markets, is expected to propel the industry to more than $1 trillion by 2030. But over the next 17 years, semiconductors will reach well beyond the numbers, changing the way people work, how they communicate, and how they measure and monitor their health and well-being. Chips will be the enabling ... » read more

Getting Smarter About Tool Maintenance

By Anne Meixner - 16 Mar, 2023 - Comments: 0

Chipmakers have begun to shift to predictive maintenance for process tools, but the hefty investment in analytics and engineering efforts means it will take some time for smart maintenance to become a widespread practice. Semiconductor manufacturers need to maintain a diverse set of equipment to process the flow of wafers, dies, packaged parts, and boards running through factories. OSAT and ... » read more

New Challenges Emerge With High-NA EUV

By Katherine Derbyshire - 16 Mar, 2023 - Comments: 3

High numerical aperture EUV exposure systems are coming — as soon as 2025 by some estimates. Though certainly a less profound change than the introduction of extreme ultraviolet lithography, high-NA lithography still brings a new set of challenges for photoresists and related materials. With a higher numerical aperture, photons strike the wafer at a shallower angle. That requires thinner p... » read more

Revising 5G RF Calibration Procedures For RF IC Production Testing

By Vineet Pancholi - 16 Mar, 2023 - Comments: 0

Modern radio frequency (RF) components introduce many challenges to outsourced semiconductor assembly and test (OSAT) suppliers whose objective is to ensure products are assembled and tested to meet the product test specifications. The growing advancement and demand for RF products for cellphones, navigational instruments, global positioning systems, Wi-Fi, receiver/transmitter (Rx/Tx) componen... » read more

Panel Tackles Chiplet Packaging Challenges

By QP Technologies Staff - 16 Mar, 2023 - Comments: 1

QP Technologies recently exhibited at the first Chiplet Summit, held January 24-26 in San Jose, California. Dick Otte, CEO of our parent company Promex Industries, participated on a panel titled “Best Packaging for Chiplets Today.” Moderated by Nobuki Islam with JCET Group, the packaging panel also included Daniel Lambalot, Alphawave Semi; Laura Mirkarimi, Adeia; Syrus Ziai, Eliyan; and Mik... » read more

A Comparative Evaluation Of DRAM Bit-Line Spacer Integration Schemes

By Dempsey Deng - 16 Mar, 2023 - Comments: 0

With decreasing dynamic random-access memory (DRAM) cell sizes, DRAM process development has become increasingly difficult. Bit-line (BL) sensing margins and refresh times have become problematic as cell sizes have decreased, due to an increase in BL parasitic capacitance (Cb). The main factor impacting Cb is the parasitic capacitance between the BL and the node contact (CBL-NC) [1]. To reduce ... » read more

Evolution Of The EUV Ecosystem Reflected At 2023 Advanced Lithography + Patterning

By Harry Levinson - 16 Mar, 2023 - Comments: 0

As anticipated, this year’s Advanced Lithography + Patterning Symposium was a very informative event, with many interesting papers being presented across a wide range of subjects. Many papers addressed topics relevant to leading-edge lithography, which these days means EUV lithography. With EUV lithography firmly established in high volume manufacturing (HVM), we could see in the presentation... » read more

Unleashing the Potential of Compound Semiconductors: Industry Leaders Collaborate at SEMICON Taiwan 2022 to Create Ecosystem

By Ashley Huang - 16 Mar, 2023 - Comments: 0

Delivering high-speed processing over 100 times faster than silicon, compound semiconductors have made the devices a magnet for developers of leading-edge technologies out to maximize performance in key segments including automotive, data centers and communications. With the rising profile of compound semiconductors as the backdrop, leading experts gathered at the Power and Opto Semiconductor F... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

category: Manufacturing, Packaging and Materials

category: IoT, Security & Automotive