Front-End Technologies Are The New Back-End Tools: Using Picosecond Ultrasonics Technology For AI Packages, Part 1


If you are a part of the semiconductor industry or simply someone interested in the field, you have likely heard what has become a common refrain: the back-end of the process is becoming more like the front-end of the process. In other words, the technologies that were once exclusively deployed in the first part of the process are being used to meet the increasingly stringent requirements of ad... » read more

In-System/In-Field Testing Using High-Quality Deterministic Test Patterns


The amount of electronic content in passenger cars is growing rapidly, primarily due to the integration of advanced safety features. The shift towards fully autonomous vehicles, which must comply with stringent safety standards, will further increase the number of electronic components required. Testing efforts must be of exceptional quality. The target test time is often limited to less than 1... » read more

Tackling Advanced Chip Manufacturing Challenges


Intel and PDF Solutions are deepening their partnership to address the growing complexity of semiconductor manufacturing at advanced nodes, according to a recent discussion between Intel CEO Lip-Bu Tan and PDF Solutions CEO John Kibarian at the Direct Connect Intel Foundry event in April. During the presentation, Kibarian highlighted how the two companies have been collaborating for approxim... » read more

The Challenges Of Testing Automotive Chips


For as long as semiconductor devices have been around, motor vehicles have been one of the toughest operating environments. Chips in automobiles, trucks, and buses are subject to extremes of temperature, humidity, vibration, and radiation. The challenges of designing for these environmental conditions have grown more pronounced with advanced technology nodes, which are necessary to satisfy mark... » read more

Challenges In Using Sub-7nm ICs In Automotive


The automotive industry is producing vehicles with increasing levels of real-time decision-making, enabled by thousands of ICs, sensors, and multi-chip packages, but making sure these systems work flawlessly throughout their expected lifetimes is a growing challenge. Automotive chips traditionally were developed at mature process nodes in five- to seven-year cycles, but much has changed over... » read more

Can Your ATPG Do This? Cut Defects Escaping Detection With ML


Chipmakers worldwide consider Automatic Test Pattern Generation (ATPG) their go-to method for achieving high test coverage in production. ATPG generates test patterns designed to detect faults in the silicon and ensures they are applied effectively using the chip’s Design-for-Test (DFT) infrastructure. This combination enhances fault detection while optimizing test efficiency. These patter... » read more

Rethinking Chip Reliability For Harsh Conditions


As semiconductors push into environments once considered untenable, reliability expectations are being redefined. From the vacuum of space and the inside of jet engines to deep industrial automation and electrified drivetrains, chips now must endure extreme temperature swings, corrosive atmospheres, mechanical vibration, radiation, and unpredictable power cycles, all while delivering increasing... » read more

High-Quality Data Needed To Better Utilize Fab Data Streams


Fab operations have wrestled with big data management issues for decades. Standards help, but only if sufficient attention to detail is taken during collection. Semiconductor wafer manufaFcturing represents one of the most complex manufacturing processes in the world. With each generation of process improvement comes more sophisticated fab equipment, new process recipes, and exponential incr... » read more

The Data Dilemma In Semiconductor Testing And Why It Matters: Part 1


In today’s semiconductor industry, machine learning (ML) is no longer a buzzword — it’s an operational necessity. From optimizing test flows to identifying device drifts and executing advanced analytics like VMIN or trimming, ML-based applications are increasingly used to boost yields, improve quality, and lower test costs. But there’s a catch. To make these intelligent applications ... » read more

Stress-Related Local Layout Effects In FinFET Technology And Device Design Sensitivity


Abstract: "Transistor characteristics in advanced technology nodes are strongly impacted by devices design and process integration choices. Variation in the layout and pattern configuration in close proximity to the device often causes undesirable sensitivities known as Local Layout Effects (LLEs). One of the sensitivities is related to carrier mobility dependence on mechanical stress, modul... » read more

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