category: Test, Measurement and Analytics

category: IoT, Security & Automotive

The Future Of Fault Coverage In Chips
By Gregory Haley - 14 May, 2024 - Comments: 0

Heterogeneous integration and sophisticated packaging are making chips more difficult to test, necessitating more versatile and efficient testing methods to minimize the time and cost it takes for each test insertion. In the past, test costs typically were limited to about 2% of the total cost of a chip. That cost has been rising in recent years, and with chiplets, advanced packaging, and mo... » read more

Advancing Product Performance Through Adaptable Production Test Equipment
By Michael Bryner - 14 May, 2024 - Comments: 0

Semiconductors are the backbone of modern electronics, powering everything from smartphones and laptops to autonomous vehicles and advanced medical equipment. As the semiconductor industry continues to push technological boundaries to deliver faster, smaller, and more powerful devices, ensuring the reliability and optimal performance of these components becomes increasingly challenging. A modu... » read more

Battery Management Testing: Alleviating EV Buyer Anxiety
By Thomas Koehler - 14 May, 2024 - Comments: 0

As the electric vehicle (EV) market surges towards 2040, fueled by strong consumer enthusiasm, the need to address key concerns about EV range, reliability, and battery life has become critical. Anxiety over potential range limitations, amplified by fears of scarce charging options, alongside safety worries due to media-reported battery incidents, have slowed adoption rates. Here, the semicondu... » read more

Using Deep Learning ADC For Defect Classification For Automatic Defect Inspection
By Onto Innovation - 14 May, 2024 - Comments: 0

In traditional semiconductor packaging, manual defect review after automated optical inspection (AOI) is an arduous task for operators and engineers, involving review of both good and bad die. It is hard to avoid human errors when reviewing millions of defect images every day, and as a result, underkill or overkill of die can occur. Automatic defect classification (ADC) can reduce the number of... » read more

The Crucial Role Of High-Performance Computing In 2024: Balancing Cost And Innovation
By Keith Schaub - 14 May, 2024 - Comments: 0

We live in a world where digital queries run the Information Superhighway and in turn, our lives. This means that the importance of High-Performance Computing (HPC) cannot be overstated. The technology behind this continues to be a cornerstone for advancing our world and improving productivity. To put it another way, can you imagine a day, a week, when you are not querying something? So, let... » read more

Improvement of High-Gradation DDIC Device Test Yield By T6391 High-Accuracy Measurement Solution
By Advantest - 14 May, 2024 - Comments: 0

For DDIC (Display Driver IC) for OLED (Organic Light Emitting Diode) displays for smartphones and IT displays (tablets, laptops) and head mounted displays for AR (Augmented Reality)/VR (Virtual Reality), the output voltage will be divided into more highly-defined steps than in the past. A new per-pin digitizer and comparator module “LCD HP” was developed to measure the output voltage of the... » read more

Return On Investment Of A Pre-Reflow AOI System
By Nordson Test And Inspection - 14 May, 2024 - Comments: 0

This paper describes the losses from defects at the placement process in the SMT line. Two case studies of European and Taiwanese SMT manufacturers illustrate the actual losses from their defects. An evaluation method to select a pre-reflow AOI system maximizing the return on investment (ROI) is introduced. In the end, ROIs of three commercial pre-reflow AOI systems are compared to demonstrate ... » read more

Doing More At Functional Test
By Anne Meixner - 14 May, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the increasing importance of functional test, especially in high-performance computing, with Klaus-Dieter Hilliges, V93000 platform extension manager at Advantest Europe; Robert Cavagnaro, fellow in the Design Engineering Group at Intel (responsible for manufacturing and test strategy of data center products); Nitza Basoco, tec... » read more

Overlay Optimization In Advanced IC Substrates
By Ed Sperling - 29 Apr, 2024 - Comments: 1

Overlay is becoming a significant problem in the manufacturing of semiconductors, especially in the world of advanced packaging substrates — think panels — the larger the area, the greater the potential for distortion due to warpage. Solving this issue requires more accurate models, better communication through feed forward/feed back throughout the flow, and real-time analytics that are bak... » read more

IC Test And Quality Requirements Drive New Collaboration
By Laura Peters - 09 Apr, 2024 - Comments: 0

Rapidly increasing chip and package complexity, coupled with an incessant demand for more reliability, has triggered a frenzy of alliances and working relationships that are starting to redefine how chips are tested and monitored. At the core of this shift is a growing recognition that no company can do everything, and that to work together will require much tighter integration of flows, met... » read more

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