Power/Performance Bits: Oct. 19


Post-quantum crypto chip Researchers at the Technical University of Munich (TUM) designed and had fabricated an ASIC to run new encryption algorithms that can stand up to quantum computing. “Ours is the first chip for post-quantum cryptography to be based entirely on a hardware/software co-design approach,” said Georg Sigl, Professor of Security in Information Technology at TUM. “As a... » read more

Power/Performance Bits: Oct. 11


Finer printed circuits Researchers from the National Institute for Materials Science in Japan, Jiangnan University, Zhengzhou University, Senju Metal Industry Co., and C-INK Co. developed a way to print smaller features for printed electronics. The directed self-assembly method increases the chemical polarity of predetermined areas on a surface, which promoted selective adhesion of metallic na... » read more

Power/Performance Bits: Oct. 5


Modeling resistive-switching memory Researchers from Singapore University of Technology and Design (SUTD) and Chang Gung University developed a new toolkit for modeling current in resistive-switching memory devices. The team said that traditional physical-based models need to consider complex behaviors to model current in resistive memory, and there's a risk of permanent device damage due t... » read more

Power/Performance Bits: Sept. 28


Pneumatic memory Engineers at the University of California Riverside developed a pneumatic memory that can be used to control soft robots. Pneumatic soft robots use pressurized air to move soft, rubbery limbs and grippers, making them ideal for delicate tasks as well as safer to be around. However, they still require electronic valves and computers to control and maintain positions. The ... » read more

Security Research Bits


A number of hardware security-related technical papers were presented at the August 2021 USENIX Security Symposium. The organization provides open access research, and the presentation slides and papers are free to the public. Topics include side-channel attacks and defenses, embedded security, hardware security tokens, and more. Here are some highlights with associated links:   [tab... » read more

Power/Performance Bits: Sept. 21


Catching switches in action Researchers from SLAC National Accelerator Laboratory, Stanford University, Hewlett Packard Labs, Penn State University, and Purdue University observed atoms moving inside an electronic switch as it turns on and off, revealing a state they suspect could lead to faster, more energy-efficient devices. "This research is a breakthrough in ultrafast technology and sci... » read more

Power/Performance Bits: Sept. 14


Thermal management material Engineers at the University of California Los Angeles integrated a new thermal management material, boron arsenide, with a HEMT chip to demonstrate the material's potential. The team developed boron arsenide as a thermal management material in 2018 and found it to be very effective at drawing and dissipating heat. In the latest experiments, they used wide band... » read more

Power/Performance Bits: Sept. 8


Backscatter radios for 5G Researchers at the Georgia Institute of Technology, Nokia Bell Labs, and Heriot-Watt University propose using backscatter radios to support high-throughput communication and 5G-speed Gb/sec data transfer using only a single transistor. “Our breakthrough is being able to communicate over 5G/millimeter-wave (mmWave) frequencies without actually having a full mmWave... » read more

Power/Performance Bits: Aug. 31


Securing memory Researchers at Columbia University suggest several ways to make computing more secure without imposing a system performance penalty. The efforts focus on memory security, specifically pointers. "Memory safety has been a problem for nearly 40 years and numerous solutions have been proposed. We believe that memory safety continues to be a problem because it does not distribute... » read more

Power/Performance Bits: Aug. 24


Low power AI Engineers at the Swiss Center for Electronics and Microtechnology (CSEM) designed an SoC for edge AI applications that can run on solar power or a small battery. The SoC consists of an ASIC chip with RISC-V processor developed at CSEM along with two tightly coupled machine-learning accelerators: one for face detection, for example, and one for classification. The first is a bin... » read more

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