category: Round Tables

category: IoT, Security & Automotive

Experts At The Table: Coherency
By Ed Sperling - 03 Aug, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss coherency with Mirit Fromovich, principal solutions engineer at Cadence; Drew Wingard, CTO of Sonics; Mike Gianfagna, vice president of marketing at Atrenta, and Marcello Coppola, technical director at STMicroelectronics. What follow are excerpts of that conversation. SLD: How do we bring software more in line with the hardware to impr... » read more

Experts At The Table: Multipatterning
By Ed Sperling - 31 Jul, 2012 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael White, physical verification product line manager at Mentor Graphics; Luigi Capodieci, R&D fellow at GlobalFoundries; Lars Liebmann, IBM distinguished engineer; Rob Aitken, ARM fellow; Jean-Pierre Geronimi, CAD director at STMicroelectronics; and Kuang-Kuo Lin, director of foundry design enablement at Samsung El... » read more

Experts At The Table: Pain Points
By Ed Sperling - 27 Jul, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down with Vinod Kariat, a Cadence fellow; Premal Buch, vice president of software engineering at Altera; Vic Kulkarni, general manager of Apache Design; Bernard Murphy, CTO at Atrenta, and Laurent Moll, CTO at Arteris. What follows are excerpts of that conversation. LPHP: What comes next requires a lot of guesswork in the design, do... » read more

Experts At The Table: Coherency
By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss coherency with Mirit Fromovich, principal solutions engineer at Cadence; Drew Wingard, CTO of Sonics; Mike Gianfagna, vice president of marketing at Atrenta, and Marcello Coppola, technical director at STMicroelectronics. What follow are excerpts of that conversation. SLD: What’s driving coherency and what sort of issues are you encou... » read more

Experts At The Table: Stacking The Deck
By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ann Steffora Mutschler There is no doubt 3D stacking brings challenges not only from the design perspective, but also on the tool side. EDA vendors have been working for more than a few years to ready tools for stacked-die designs. How smooth the transition is, however, is a big question mark. Because the approach is new, not all the challenges are fully understood yet. And while most ED... » read more

Experts At The Table: Does 20nm Break System-Level Design?
By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss design at 20nm with Drew Wingard, chief technology officer at Sonics; Kelvin Low, deputy director of product marketing at GlobalFoundries, Frank Schirrmeister, group director of product marketing for system development in the system and software realization group at Cadence; and Mike Gianfagna, vice president of marketing at At... » read more

Experts At The Table: Multipatterning
By Ed Sperling - 20 Jul, 2012 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael White, physical verification product line manager at Mentor Graphics; Luigi Capodieci, R&D fellow at GlobalFoundries; Lars Liebmann, IBM distinguished engineer; Rob Aitken, ARM fellow; Jean-Pierre Geronimi, CAD director at STMicroelectronics; and Kuang-Kuo Lin, director of foundry design enablement at Samsung Ele... » read more

Experts At The Table: Pain Points
By Ed Sperling - 20 Jul, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down with Vinod Kariat, a Cadence fellow; Premal Buch, vice president of software engineering at Altera; Vic Kulkarni, general manager of Apache Design; Bernard Murphy, CTO at Atrenta, and Laurent Moll, CTO at Arteris. What follows are excerpts of that conversation. LPHP: With stacked die it’s no longer one company making an SoC. W... » read more

Experts At The Table: Does 20nm Break System-Level Design?
By Ed Sperling - 13 Jul, 2012 - Comments: 1

By Ann Steffora Mutschler System-Level Design sat down to discuss design at 20nm with Drew Wingard, chief technology officer at Sonics; Kelvin Low, deputy director of product marketing at GlobalFoundries, Frank Schirrmeister, group director of product marketing for system development in the system and software realization group at Cadence; and Mike Gianfagna, vice president of marketing at Atr... » read more

Experts At The Table: Pain Points
By Ed Sperling - 12 Jul, 2012 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down with Vinod Kariat, a Cadence fellow; Premal Buch, vice president of software engineering at Altera; Vic Kulkarni, general manager of Apache Design; Bernard Murphy, CTO at Atrenta, and Laurent Moll, CTO at Arteris. What follows are excerpts of that conversation. LPHP: Where will the pain points be going forward? Kariat: 20nm is... » read more

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