Transient Current Crunch


When Intel talks, people listen. So when Intel executive VP Dadi Perlmutter said in a keynote at ISSCC in 2012 that transient power noise was one of the most limiting aspects of the chip design process—and how the package and the board inductance are limiting how low they can take the supply voltage—it showed the gravity of the challenge of effectively managing transient power. Transient po... » read more

Why does EUV matter?


By Brian Bailey The end of Moore’s Law has been predicted for almost as long as the law has existed. It normally comes down to some great technological barrier that cannot be breached, only to find that a solution is just around the corner and the concerns fade until the next barrier is identified. At DAC this year (2013), there were many predictions about why Moore’s Law will end in th... » read more

Buying And Selling EDA Companies


By Ed Sperling Buying companies is the easy part. Integrating them is the hard part. It’s also the point where most acquisitions that go awry actually run into problems. There are widely different strategies for how to accomplish integration. Sometimes they work, other times they don’t. And sometimes both companies are surprised by the outcome—for better or worse. “Either you thi... » read more

Litho Roadmap Remains Cloudy


By Mark LaPedus For some time, the lithography roadmap has been cloudy. Optical lithography has extended much further than expected. And delays with the various next-generation lithography (NGL) technologies have forced the industry to re-write the roadmap on multiple occasions. Today, there is more uncertainty than ever in lithography. Until recently, for example, leading-edge logic chipma... » read more

Buying And Selling EDA Companies


By Ed Sperling The rule of thumb for mergers and acquisitions is that the majority will fail. So why, despite concerns about big companies buying up the tools of startups, does EDA’s track record look so good? There are a number of answers that are unique to the EDA industry: There is no manufacturing that needs to be absorbed by the acquirer, which greatly simplifies any deal. Sale... » read more

How Secure Is Your SoC?


The Russian Federal Guard Service’s decision to revert to typewriters—machines that leave unique mechanical fingerprints—is a good indicator of just how serious security has become in a world dominated by electronics and pervasive connectivity. What’s less apparent is the growing threat at the SoC level—inside complex chips, between the chip and the board, and between chips on the ... » read more

New Silos Form In IC Industry


By Ed Sperling For the past couple of decades corporations around the globe have been focused on down silos. In fact, it has become a mantra. It’s considered essential for making established corporations even more successful, and it’s almost always at the center of turnaround plans for troubled companies. Moreover, across a full spectrum of companies, it’s regularly cited by management c... » read more

The Controversial Spec


By Ann Steffora Mutschler Design sophistication and complexity has made it increasingly difficult to fully specify the expected behavior of a block in an SoC, but this is necessary for design and verification teams. How do you write a “good” and “complete” specification of functionality? It turns out that the discussion of defining what a good and complete specification is and how t... » read more

Inside A 450mm Metrology Consortium


By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss 450mm metrology challenges with Menachem Shoval, a former manufacturing executive at Intel and chairman of the Metro450 consortium. The Israeli-based consortium is developing metrology technology for the next-generation, 450mm wafer size. The group consists of Intel, Applied Materials, Jordan Valley, Nanomotion, Nov... » read more

Scaling The Lowly SRAM


By Mark LaPedus Chipmakers face a multitude of challenges at the 20nm logic node and beyond, including the task of cramming more functions on the same chip without compromising on power and performance. There is one major challenge that is often overlooked in the equation—scaling the lowly static RAM (SRAM). In one key application, SRAM is the component used to make on-chip cache memories... » read more

Newer posts →