Blog Review: July 8


Cadence's Paul McLellan profiles Alessandra Nardi, recipient of this year's Marie R. Pistilli Women in EDA award, how she entered the industry and her latest work on automotive and a functional safety language. In a video, Mentor's Colin Walls checks out why RISC-V is the hot new fashion in embedded systems development. A Synopsys writer explains why the MACsec security protocol is so imp... » read more

Chip Reliability Vs. Cost


Semiconductor Engineering sat down to discuss the cost, reliability and security with Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of IC EDA at Mentor, a Siemens Business; Raik Brinkmann, CEO of OneSpin Solutions; Babak Taheri, CEO of Silvaco; John Kibarian, CEO of PDF Solutions; and Prakash Narain, CEO of Real Intent. What follows are excerpts of that virtual conversation... » read more

Week In Review: Design, Low Power


Galaxy Semiconductor re-established with the planned acquisition of the Quantix Business assets from Mentor, a Siemens business. The software products Galaxy is acquiring focus on yield optimization, device characterization, and reliability improvement. Galaxy was initially founded in 1998; the Galway, Ireland-based company was then acquired by Mentor Graphics in 2016. The re-established compan... » read more

Blog Review: June 30


Cadence's Paul McLellan examines Fully Homomorphic Encryption, which allows for operations to be performed on encrypted data without decrypting it, and why it's now entering the realm of practicality. Mentor's Shivani Joshi explains the basics of using keepouts to prevent the placement of specific or all design items within a specified area and why they can make or break a first pass at crea... » read more

Gaps Emerging In System Integration


The system integration challenge is evolving, but existing tools and methods are not keeping up with the task. New tools and flows are needed to handle global concepts, such as power and thermal, that cannot be dealt with at the block level. As we potentially move into a new era where IP gets delivered as physical pieces of silicon, this lack of an accepted flow will become a stumbling block. ... » read more

Globalization And Regionalization Of Knowledge


Anyone who has clicked on the chat feature on virtual conferences may have noticed the striking mix of nationalities logging in. The explosion of these conferences, as well as video calls, has opened the door for engineers at all levels — from students to industry veterans — to exchange ideas on a global scale. In the past, companies would send a handful of their employees to conferences... » read more

Week In Review: Design, Low Power


Siemens will acquire UltraSoC, a provider of embedded analytics and monitoring solutions for applications including cybersecurity and functional safety. Founded in 2006 and based in Cambridge, U.K., the company's technology will be integrated into the Xcelerator portfolio as part of Mentor’s Tessent software product suite where it will form part of a ‘Design for Lifecycle Management’ stra... » read more

And The Survey Says…


Some of you may have received an email recently that looks something like this. Others may be getting it in a little while. This is an invitation to participate in a survey that is important for the industry, and I encourage you not to ignore it. Let me explain a little. This survey has quite a long history. It all started in 2002 when Collett International conducted the first survey. Ba... » read more

Hyperscale And Artificial Intelligence Are Reshaping Value Chains


Observing electronic ecosystems and value chains change over time is fascinating. For instance, the design chain for mobile devices fundamentally changed over the past two decades with waves of disaggregation and aggregation. Today, the area of computing and data centers is amid tectonic shifts and transformation, with the combination of hyperscale, networking, artificial intelligence (AI), and... » read more

Post Layout Simulation Is Becoming The Bottleneck For Analog Verification


My, have times changed. I remember when I first started out as a green analog designer right out of college, we would cut rubylith masking film on a large light table representing the different layers of our design to generate the design for manufacturing of the chip. We proactively worked to mitigate cross coupling of noise to our signal nets, but we were rarely concerned about interconnect re... » read more

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