Blog Review: June 3


Cadence's Paul McLellan takes a look at how Ethernet came to dominate wired networking and is now taking on automotive to provide the bandwidth necessary for the increasing number of sensors in modern vehicles. Mentor's Colin Walls notes the difficulty of assessing the quality of software, some key areas to pay attention to when assessing quality or trying to write quality code, and the bottom... » read more

The Increasingly Ordinary Task Of Verifying RISC-V


As RISC-V processor development matures and its usage in SoCs and microcontrollers grows, engineering teams are starting to look beyond the challenges of the processor core itself. So far, the majority of industry verification efforts have focused on ISA compliance to standardize the RISC-V core. Now the focus is shifting to be how to handle verification as the system grows, especially as this... » read more

High-Speed SerDes At 7/5nm


Manmeet Walia, senior product marketing manager at Synopsys, talks with Semiconductor Engineering about how to optimize PHYs for integration on all four corners of an SoC, as well as the PPA implications of moving large amounts of data across and around a chip. » read more

(Artificially) Intelligent Verification


Functional verification produces a lot of data, , but does that make it suitable for Artificial Intelligence (AI) or Machine Learning (ML)? Experts weigh in about where and how AI can help and what the industry could do to improve the benefits. "It's not necessarily the quantity," says Harry Foster, chief scientist for verification at Mentor, a Siemens Business. "It's the quality that matter... » read more

An Eye For An AI


AI comes in multiple forms and flavors. The challenge is choosing the right one for the right purpose, and recognizing that just because AI can be applied to a particular process or problem doesn't mean it should be. While AI has been billed as a ideal solution for just about every problem, there are three primary requirements for a successful application. First, there needs to be sufficient q... » read more

A Different View On Debugging


The classic approach to improve an engineering task that is becoming too complex due to its size and detail is to raise the abstraction of design representation. In this way we plan cities, build aircraft and plan 500M gate SoCs. For example, there is no way an ASIC design could go beyond a few thousand logic gates without shifting abstraction to the Register Transfer Level (RTL) and leveragin... » read more

Week In Review: Design, Low Power


Tools & IP Arm unveiled several new processor IPs. Targeting next-gen smartphones, the Cortex-A78 CPU provides a 20% increase in sustained performance over Cortex-A77-based devices within a 1-watt power budget, and more efficient management of compute workloads and on-device ML. The Mali-G78 GPU provides a 25% increase in performance over the Malti-G77. It supports up to 24 cores and in... » read more

Constrained Innovation


The semiconductor industry has long been seen as a risk-averse industry and that is probably to be expected. The rapid migration of technology nodes (lots of innovation happening there) produced a rapid expansion in transistor counts that stretched development teams to their limits. Every design had to contain more functionality while dealing with a plethora of new concerns, and be developed by... » read more

Why Cyberattacks Will Be No Match For Autonomous Vehicles


Malware, ransomware, viruses, denial-of-service attacks – these threats can leave a business reeling as it struggles to recover. Others might not recover at all, but that hasn’t stopped most industries from treating cybersecurity as an afterthought. Unfortunately, this is how it has been handled since the first hackers emerged. It’s only when a company is hit that other players start to r... » read more

Connecting Emulated Designs To Real PCIe Devices


These days verification teams no longer question whether hardware assisted verification should be used in their projects. Rather, they ask at which stage they should start using it. Contemporary System-on-Chip (SoC) designs are already sufficiently complex to make HDL simulation a bottleneck during verification, without even mentioning hardware-software co-verification or firmware and softwa... » read more

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