Blog Review: June 3

Automotive Ethernet; quality software; MACsec explained.


Cadence’s Paul McLellan takes a look at how Ethernet came to dominate wired networking and is now taking on automotive to provide the bandwidth necessary for the increasing number of sensors in modern vehicles.

Mentor’s Colin Walls notes the difficulty of assessing the quality of software, some key areas to pay attention to when assessing quality or trying to write quality code, and the bottom line of listening to customers.

Synopsys Travis Biehn, John Tapp, and Jamie Boote point to the importance of ensuring APIs exposed over a network are secure and key areas where security can usually be improved, from implementing security controls and testing to proper explanation of assumed security responsibilities.

A Rambus writer explains MACsec, or Media Access Control Security, and how it helps secure data in motion at the foundational hardware communication layer.

Arm’s Tamar Christina explains how improvements in the latest GNU Compiler Collection (GCC) boost performance by an estimated 10.5%, plus some new features.

Ansys’ Wim Slagter argues that simulated road tests should be a key component of developing autonomous vehicles to cut time and costs.

SEMI’s Irene Huang and Winnie Chang share Taiwan’s rapid development effort for COVID-19 testing reagents and devices, aided by AI-assisted lung scans and big data models for global transmission paths.

Plus, check out the blogs featured in the latest Systems & Design newsletter:

Editor in Chief Ed Sperling stresses that understanding where artificial intelligence will be useful is essential.

EDA Technology Editor Brian Bailey asks what’s really holding back fundamental changes to the way we design chips.

Imagination’s Marc Canel advocates building security into the very foundation of new automotive platforms.

Aldec’s Krzysztof Szczur explains why the extra effort in connecting an emulator with an external environment pays off over the long run.

Codasip’s Roddy Urquhart explains how to get better performance by creating a processor core with custom instructions targeted to address bottlenecks.

Cadence’s Frank Schirrmeister explores what the new generation of mobile device users would like to see in upcoming technologies.

OneSpin’s Rob van Blommestein examines the challenges and solutions when the consequences of a faulty chip can be deadly.

Mentor’s Fady Fouad, Esraa Swillam, and Jeff Wilson propose an automated flow to insert correct-by-construction vias as needed to reduce IR drop and EM issues.

Synopsys’ Iain Singleton lays out the critical considerations for achieving a quantifiable measure of functional verification completeness.

Vtool’s Hagai Arbel explains how raising the abstraction level plus machine learning helps reduce time to market.

Coventor’s Benjamin Vincent walks us through the benefits and challenges of a new, next-generation semiconductor architecture.

CyberOptics’ Subodh Kulkarni digs into how to make more measurements in a fixed amount of time.

Leave a Reply

(Note: This name will be displayed publicly)