Partitioning Drives Architectural Considerations


There are multiple reasons for design partitioning. One is complexity, because it’s faster and simpler to divide and conquer, particularly with third-party IP. A second reason involves power, where it may be more efficient to divide up functionality so each function be right-sized. A third involves performance, where memory utilization and processing can be split up according to functional pr... » read more

System Bits: Aug. 28


Characterizing quantum computers To accelerate and simplify the imposing task of diagnosing quantum computers, a Rice University computer scientist and his colleagues have proposed a method to do just this. The development of a nonconventional method as a diagnostic tool for powerful, next-generation computers that depend on the spooky actions of quantum bits — aka qubits — which are sw... » read more

Is Software Necessary?


Hardware must be capable of running any software. While that might have been a good mantra when chips were relatively simple, it becomes an impossible verification task when dealing with SoCs that contain dozens of deeply embedded processors. When does it become necessary to use production software and what problems can that get you into? When verification targets such as power are added, it... » read more

Week In Review: Design, Low Power


Wafer company Soitec and European missile manufacturer MBDA joined together to buy the assets of Dolphin Integration. The IP and EDA tool provider, founded in 1985 in Grenoble, France, has been struggling, recently concluding insolvency proceedings and going into receivership. The new joint venture will absorb Dolphin's 155 employees and be owned 60% by Soitec, 40% by MBDA. The two companies co... » read more

Architects Firmly In Control


Moore's Law isn't dead, but it certainly isn't what it used to be. While there may be three or four more generations of node shrinks ahead, the power/performance benefits of scaling are falling off. This is evident in new chip architectures that were introduced at this year's Hot Chips conference. Originally started to show off the latest CPUs and co-processors, in past years the focus has b... » read more

Hiring And Firing


I doubt if there is a manager, in any company, who likes to fire people. In addition, most companies are very cautious about getting rid of people. Human resources departments often put in place lengthy and complex procedures to provide a clear and well-documented path to someone's termination. During a recent Oski executive dinner, participants were quite heated in their discussion about th... » read more

Digital IC Bring-Up With A Bench-Top Environment


One of the hottest markets for IC today is artificial intelligence (AI). The designs for AI chips are also among the largest and most complex, with billions of transistors, thousands of memory instances, and complex design-for-test (DFT) implementations with unique bring up and debug requirements. At this point, the volume of new AI chips is relatively low, but time-to-market is of paramount im... » read more

Demystifying EDA Support For ISO 26262 Tool Qualification


My new, mid-size car is equipped with many advanced driver-assistance systems. To be honest, it’s taking me time to get used to some of them, as, for example, lane-centering assist that seamlessly takes control of my steering wheel. However, I cannot wait to get my hands off a fully autonomous vehicle and be able to take a nap while 7nm chips run machine learning and other artificial intellig... » read more

Verification Trends Enabling A 5G Future


Applications have driven requirements for verification for quite some time now, as I have written previously regarding Aero & Defense, AI and Machine Learning and the Internet of Things. In wireless communication, we are just at the brink of the transition to Fifth Generation Networks, or 5G. This transition will not only lead to new applications and use models that will impact our day-to-d... » read more

Is Synthesis Still Process-Independent?


For many years, the idea that the release of a new process node from one of the major silicon foundries would require you to update your synthesis flow was a non-starter. Synthesis used the available timing, area and power models in the libraries and that was the beginning and end of the discussion. With the arrival of physical synthesis, physical effects could be taken into consideration in... » read more

← Older posts Newer posts →