category: Design & Verification

category: IoT, Security & Automotive

Cost Characteristics of the 2.5D Chiplet-Based SiP System
By Technical Paper Link - 08 Nov, 2022 - Comments: 0

A technical paper titled "Cost-Aware Exploration for Chiplet-Based Architecture with Advanced Packaging Technologies" was published by researchers at UCSB, University of California, Santa Barbara. Abstract: "The chiplet-based System-in-Package~(SiP) technology enables more design flexibility via various inter-chiplet connection and heterogeneous integration. However, it is not known how to ... » read more

Energy of Computing As A Key Design Aspect (SLAC/Stanford, MIT)
By Technical Paper Link - 08 Nov, 2022 - Comments: 0

A technical paper titled "Trends in Energy Estimates for Computing in AI/Machine Learning Accelerators, Supercomputers, and Compute-Intensive Applications" was published by researchers at SLAC/Stanford University and MIT. Abstract: "We examine the computational energy requirements of different systems driven by the geometrical scaling law, and increasing use of Artificial Intelligence or Ma... » read more

Redesigning Core and Cache Hierarchy For A General-Purpose Monolithic 3D System
By Technical Paper Link - 24 Oct, 2022 - Comments: 0

A technical paper titled "RevaMp3D: Architecting the Processor Core and Cache Hierarchy for Systems with Monolithically-Integrated Logic and Memory" was published by researchers at ETH Zürich, KMUTNB, NTUA, and University of Toronto. Abstract: "Recent nano-technological advances enable the Monolithic 3D (M3D) integration of multiple memory and logic layers in a single chip with fine-graine... » read more

RISC-V Virtual Prototype
By Technical Paper Link - 12 Oct, 2022 - Comments: 0

A new technical paper titled "Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype" was published by researchers at DFKI GmbH and University of Bremen. Abstract "RISC-V is a modern Instruction Set Architecture (ISA) that, by its open nature in combination with a clean and modular design, has enormous potential to become a game changer in the Internet o... » read more

Automating The Detection of Hardware Common Weakness Enumerations In Early Design
By Technical Paper Link - 12 Oct, 2022 - Comments: 0

A new technical paper titled "Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design" was published by researchers at NYU, Intel, Duke and University of Calgary. "To help prevent hardware security vulnerabilities from propagating to later design stages where fixes are costly, it is crucial to identify security concerns as early as possible, such as in RTL designs. ... » read more

A Full-Stack Domain-Specific Overlay Generation Framework Verified On FPGA
By Technical Paper Link - 12 Oct, 2022 - Comments: 0

A new technical paper titled "OverGen: Improving FPGA Usability through Domain-specific Overlay Generation" by researchers at UCLA and Chinese Academy of Sciences. "Our essential idea is to develop a hardware generation framework targeting a highly-customizable overlay, so that the abstraction gap can be lowered by tuning the design instance to applications of interest. We leverage and ext... » read more

Functional Safety Verification Of Serial Peripheral Interface
By Technical Paper Link - 03 Oct, 2022 - Comments: 0

A new technical paper titled "FMEDA based Fault Injection to Validate Safety Architecture of SPI" was published by researchers at R.V. College of Engineering in India and Analog Devices. Abstract "The integration of advanced technologies into Electrical Vehicles (EV) has been increasing in recent times, so it has become crucial to evaluate the risk of the technologies that are deployed into... » read more

Speeding-Up Thermal Simulations Of Chips With ML
By Technical Paper Link - 02 Oct, 2022 - Comments: 0

A new technical paper titled "A Thermal Machine Learning Solver For Chip Simulation" was published by researchers at Ansys. Abstract "Thermal analysis provides deeper insights into electronic chips' behavior under different temperature scenarios and enables faster design exploration. However, obtaining detailed and accurate thermal profile on chip is very time-consuming using FEM or CFD. Th... » read more

Six Qubit Processor (TU Delft, QuTech, TNO)
By Technical Paper Link - 29 Sep, 2022 - Comments: 0

A new technical paper titled "Universal control of a six-qubit quantum processor in silicon" was just published by researchers at Delft University of Technology, QuTech and Netherlands Organization for Applied Scientific Research (TNO). "We increase the number of qubits and simultaneously achieve respectable fidelities for universal operation, state preparation and measurement. We design, fa... » read more

Framework Based on an RISC-V Microprocessor Supporting LiM Operations
By Technical Paper Link - 29 Sep, 2022 - Comments: 0

A new technical paper titled "RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures" was published by researchers at Politecnico di Torino (Italy), Univerity of Tor Vergata (Italy), and University of Twente (The Netherlands). Abstract: "Most modern CPU architectures are based on the von Neumann principle, where memory and processing units are separate entities. Although processin... » read more

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