Warpage Of Compression Molded SiP Strips


By Eric Ouyang, Yonghyuk Jeong, JaeMyong Kim, JaePil Kim, OhYoung Kwon, and Michael Liu of JCET; and Susan Lin, Jenn An Wang, Anthony Yang, and Eric Yang of CoreTech System (Moldex3D). Abstract System-in-Package (SiP) technology has been used for a wide range of electronic devices, but the warpage behavior of the package can be difficult to control and predict due to complex manufacturing p... » read more

Topology for Substrate Routing in Semiconductor Package Design


Abstract: In this work, we propose a new signal routing method for solving routing problems that occur in the design process of semiconductor package substrates. Our work uses a topological transformation of the layers of the package substrate in order to simplify the routing problem into a problem of connecting points on a circle with non-intersecting straight line segments. The circle, whi... » read more

Non-destructive Thickness Characterisation of 3D Multilayer Semiconductor Devices Using Optical Spectral Measurements and Machine Learning


Abstract: "Three-dimensional (3D) semiconductor devices can address the limitations of traditional two-dimensional (2D) devices by expanding the integration space in the vertical direction. A 3D NOT-AND (NAND) flash memory device ispresently the most commercially successful 3D semiconductor device. It vertically stacks more than 100 semiconductor material layers to provide more storage capac... » read more

X-ray Imaging of Silicon Die Within Fully Packaged Semiconductor Devices


Abstract: "X-ray diffraction imaging (XRDI) (topography) measurements of silicon die warpage within fully packaged commercial quad-flat no-lead devices are described. Using synchrotron radiation, it has been shown that the tilt of the lattice planes in the Analog Devices AD9253 die initially falls, but after 100 °C, it rises again. The twist across the die wafer falls linearly with an incre... » read more

Screen Printed Chipless RFID Tags on Packaging Substrates


Abstract: "A chipless radio frequency identification (RFID) tag is a suitable low-cost alternative to any chip-based RFID one. The flexibility to use low-cost printing techniques makes chipless RFID a competitive technology. In this paper, we report an evaluation of the microwave performance of two different screen-printed chipless tags in the 3–6 GHz range. The tags were designed and scre... » read more

Reasserting U.S. Leadership in Microelectronics (MIT)


In this new paper, MIT researchers lay out a vision and approach for how universities can help the U.S. regain leadership as a semiconductor superpower. The paper looks at education and workforce development, research, technology translation, startups, intellectual property, academic infrastructure and regional network efficiencies. Find the paper here and the MIT news writeup from 1/19/2022... » read more

Conceptualized Improvement on Transparent Glass Die for a Robust Manufacturing Process


Abstract: "Glass die are one of the materials used by semiconductor plants during production of specialized quad-flat no-leads (QFN) products. With its transparent appearance and fragile characteristics, several challenges are encountered and analyzed to resolve unwanted issues and to have a robust process manufacturing. This paper will discuss a potential concept of process improvement on t... » read more

High Electron Mobility in Strained GaAs Nanowires


Abstract: "Transistor concepts based on semiconductor nanowires promise high performance, lower energy consumption and better integrability in various platforms in nanoscale dimensions. Concerning the intrinsic transport properties of electrons in nanowires, relatively high mobility values that approach those in bulk crystals have been obtained only in core/shell heterostructures, where elec... » read more

Efficient Ohmic contacts and built-in atomic sublayer protection in MoSi2N4 and WSi2N4 monolayers


Abstract "Metal contacts to two-dimensional (2D) semiconductors are often plagued by the strong Fermi level pinning (FLP) effect which reduces the tunability of the Schottky barrier height (SBH) and degrades the performance of 2D semiconductor devices. Here, we show that MoSi2N4 and WSi2N4 monolayers—an emerging 2D semiconductor family with exceptional physical properties—exhibit stron... » read more

Pushing the limits of EUV mask repair: addressing sub-10 nm defects with the next generation e-beam-based mask repair tool


Abstract "Mask repair is an essential step in the manufacturing process of extreme ultraviolet (EUV) masks. Its key challenge is to continuously improve resolution and control to enable the repair of the ever-shrinking feature sizes on mask along the EUV roadmap. The state-of-the-art mask repair method is gas-assisted electron-beam (e-beam) lithography also referred to as focused electron-beam... » read more

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