Analog Edge Inference with ReRAM


Abstract "As the demands of big data applications and deep learning continue to rise, the industry is increasingly looking to artificial intelligence (AI) accelerators. Analog in-memory computing (AiMC) with emerging nonvolatile devices enable good hardware solutions, due to its high energy efficiency in accelerating the multiply-and-accumulation (MAC) operation. Herein, an Applied Materials... » read more

A Case for Transparent Reliability in DRAM Systems


New technical paper from ETH Zurich and TU Delft. Abstract "Today's systems have diverse needs that are difficult to address using one-size-fits-all commodity DRAM. Unfortunately, although system designers can theoretically adapt commodity DRAM chips to meet their particular design goals (e.g., by reducing access timings to improve performance, implementing system-level RowHammer mitigati... » read more

Memory Bandwidth Regulation on Hybrid NVM/DRAM Platforms


New technical paper from Shanghai Jiao Tong University Abstract "Non-volatile memory (NVM) has emerged as a new memory media, resulting in a hybrid NVM/DRAM configuration in typical servers. Memory-intensive applications competing for the scant memory bandwidth can yield degraded performance. Identifying the noisy neighbors and regulating the memory bandwidth usage of them can alleviate th... » read more

Data-driven RRAM device models using Kriging interpolation


New technical paper from The George Washington University and NIST with support from DARPA and others. Abstract "A two-tier Kriging interpolation approach is proposed to model jump tables for resistive switches. Originally developed for mining and geostatistics, its locality of the calculation makes this approach particularly powerful for modeling electronic devices with complex behavior la... » read more

Memristive synaptic device based on a natural organic material—honey for spiking neural network in biodegradable neuromorphic systems


New academic paper from Washington State University, supported by a grant from the National Science Foundation. Abstract: "Spiking neural network (SNN) in future neuromorphic architectures requires hardware devices to be not only capable of emulating fundamental functionalities of biological synapse such as spike-timing dependent plasticity (STDP) and spike-rate dependent plasticity (SRDP),... » read more

An adaptive synaptic array using Fowler–Nordheim dynamic analog memory


Abstract "In this paper we present an adaptive synaptic array that can be used to improve the energy-efficiency of training machine learning (ML) systems. The synaptic array comprises of an ensemble of analog memory elements, each of which is a micro-scale dynamical system in its own right, storing information in its temporal state trajectory. The state trajectories are then modulated by a sys... » read more

Experimental photonic quantum memristor


Abstract "Memristive devices are a class of physical systems with history-dependent dynamics characterized by signature hysteresis loops in their input–output relations. In the past few decades, memristive devices have attracted enormous interest in electronics. This is because memristive dynamics is very pervasive in nanoscale devices, and has potentially groundbreaking applications ranging... » read more

An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory


Abstract "A long battery life is a first-class design objective for mobile devices, and main memory accounts for a major portion of total energy consumption. Moreover, the energy consumption from memory is expected to increase further with ever-growing demands for bandwidth and capacity. A hybrid memory system with both DRAM and PCM can be an attractive solution to provide additional capacity ... » read more

NAND and NOR logic-in-memory comprising silicon nanowire feedback field-effect transistors


Abstract: "The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindra... » read more

Quantifying Rowhammer Vulnerability for DRAM Security


Abstract: "Rowhammer is a memory-based attack that leverages capacitive-coupling to induce faults in modern dynamic random-access memory (DRAM). Over the last decade, a significant number of Rowhammer attacks have been presented to reveal that it is a severe security issue capable of causing privilege escalations, launching distributed denial-of-service (DDoS) attacks, and even runtime attack ... » read more

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