category: Transistors

category: IoT, Security & Automotive

8-In-1 Reconfigurable Logic Gate (TU Dresden)
By Technical Paper Link - 03 Jan, 2024 - Comments: 0

A technical paper titled “The RGATE: an 8-in-1 Polymorphic Logic Gate Built from Reconfigurable Field Effect Transistors” was published by researchers at TU Dresden and NaMLab. Abstract: "We present the hardware implementation of a reconfigurable universal logic gate, that we call RGATE, able to deliver up to eight different logic functionalities and based on a symmetric four-transistors... » read more

Rapid Prototyping For Emerging Semiconductor Devices
By Technical Paper Link - 03 Jan, 2024 - Comments: 0

A technical paper titled “Generating Predictive Models for Emerging Semiconductor Devices” was published by researchers at TU Darmstadt and NaMLab. Abstract: "Circuit design requires fast and scalable models which are compatible to modern electronic design automation tools. For this task typically analytical compact models are preferred. However, for emerging device concepts with altered ... » read more

Quantum Confinement And Its Effect On The Thermoelectric Performance For Thermal Management
By Technical Paper Link - 03 Jan, 2024 - Comments: 0

A technical paper titled “Enhanced thermoelectric performance via quantum confinement in a metal oxide semiconductor field effect transistor for thermal management” was published by researchers at Sandia National Laboratories and Kansas State University. Abstract: "The performance of thermoelectric devices is gauged by the dimensionless figure of merit ZT. Improving ZT has proven to be a ... » read more

Nanoscale Reconfigurable Si Transistors (TU Wien, CNRS, UNC)
By Technical Paper Link - 20 Dec, 2023 - Comments: 0

A new technical paper titled "Nanoscale Reconfigurable Si Transistors: From Wires to Sheets and Unto Multi-Wire Channels" was published by researchers at TU Wien, CNRS, and University of North Carolina at Chapel Hill. Abstract: "In this work, bottom-up Al–Si–Al nanowire (NW) heterostructures are presented, which act as a prototype vehicle toward top-down fabricated nanosheet (NS) and ... » read more

Forward Body Biasing in Bulk Cryo-CMOS With Negligible Leakage (TU Delft)
By Technical Paper Link - 20 Dec, 2023 - Comments: 0

A new technical paper titled "Cryogenic-Aware Forward Body Biasing in Bulk CMOS" was published by researchers at QuTech, Tu Delft. Abstract "Cryogenic CMOS (cryo-CMOS) circuits are often hindered by the cryogenic threshold-voltage increase. To mitigate such an increase, a forward body biasing (FBB) technique in bulk CMOS is proposed, which can operate up to the nominal supply without prob... » read more

GAA NSFETs: ML for Device and Circuit Modeling
By Technical Paper Link - 30 Nov, 2023 - Comments: 0

A new technical paper titled "A Comprehensive Technique Based on Machine Learning for Device and Circuit Modeling of Gate-All-Around Nanosheet Transistors" was published by researchers at National Yang Ming Chiao Tung University. Abstract (excerpt) "Machine learning (ML) is poised to play an important part in advancing the predicting capability in semiconductor device compact modeling domai... » read more

Engineering chirality at wafer scale with ordered CNT architecture (Rice University and others)
By Technical Paper Link - 29 Nov, 2023 - Comments: 0

A new technical paper titled "Engineering chirality at wafer scale with ordered carbon nanotube architectures" was published by researchers at Rice University, University of Utah, J.A. Woollam Co. and Tokyo Metropolitan University. Abstract "Creating artificial matter with controllable chirality in a simple and scalable manner brings new opportunities to diverse areas. Here we show two su... » read more

Investigating Subthreshold Current Suppression in ReS2 Nanosheet-Based FETs
By Technical Paper Link - 26 Nov, 2023 - Comments: 0

A technical paper titled “Subthreshold Current Suppression in ReS2 Nanosheet-Based Field-Effect Transistors at High Temperatures” was published by researchers at University of Salerno, Università degli studi del Sannio, and University of Exeter. Abstract: "Two-dimensional rhenium disulfide (ReS2), a member of the transition-metal dichalcogenide family, has received significant attention... » read more

Highly Stacked Nanowire FETs To Enhance Drive Current And Transistor Density
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “Fabrication and performance of highly stacked GeSi nanowire field effect transistors” was published by researchers at National Taiwan University. Abstract: "Horizontal gate-all-around field effect transistors (GAAFETs) are used to replace FinFETs due to their good electrostatics and short channel control. Highly stacked nanowire channels are widely believed to en... » read more

Stacked Ferroelectric Memory Array Comprised Of Laterally Gated Ferroelectric Field-Effect Transistors
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “Laterally gated ferroelectric field effect transistor (LG-FeFET) using α-In2Se3  for stacked in-memory computing array” was published by researchers at Samsung Electronics and Sungkyunkwan University. Abstract: "In-memory computing is an attractive alternative for handling data-intensive tasks as it employs parallel processing without the need for data transfe... » read more

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