category: Top Stories

category: IoT, Security & Automotive

Machine Learning’s Limits
By Ed Sperling - 03 Jul, 2018 - Comments: 0

Semiconductor Engineering sat down with Rob Aitken, an Arm fellow; Raik Brinkmann, CEO of OneSpin Solutions; Patrick Soheili, vice president of business and corporate development at eSilicon; and Chris Rowen, CEO of Babblelabs. What follows are excerpts of that conversation. To view part one, click here. SE: How much of what goes wrong in machine learning depends on the algorithm being wrong... » read more

The Darker Side Of Consolidation
By Ed Sperling - 02 Jul, 2018 - Comments: 1

Another wave of consolidation is underway in the semiconductor industry, setting the stage for some high-stakes competitive battles over market turf and sowing confusion across the supply chain about continued support throughout a product's projected lifetime. The consolidation comes as chipmakers already are grappling with rising complexity, the loss of a roadmap for future designs as Moore... » read more

Adding NoCs To FPGA SoCs
By Ann Mutschler - 28 Jun, 2018 - Comments: 0

FPGA SoCs straddle the line between flexibility and performance by combining elements of both FPGAs and ASICs. But as they find a home in more safety- and mission-critical markets, they also are facing some of the same issues as standard SoCs, including the ability to move larger and larger amounts of data quickly throughout an increasingly complex device, and the difficulty in verifying and de... » read more

Searching For A System Abstraction
By Brian Bailey - 28 Jun, 2018 - Comments: 3

Without abstraction, advances in semiconductor design would have stalled decades ago and circuits would remain about the same size as analog blocks. No new abstractions have emerged since the 1990s that have found widespread adoption. The slack was taken up by IP and reuse, but IP blocks are becoming larger and more complex. Verification by isolation is no longer a viable strategy at the system... » read more

Formal Abstraction And Coverage
By Brian Bailey - 28 Jun, 2018 - Comments: 0

For the past three years, Oski Technology has facilitated a gathering of formal verification experts over dinner to discuss the problems and issues that they face. They discuss techniques they have been attempting with formal verification technologies, along with the results they have been achieving. Semiconductor Engineering was there to record that conversation and to condense it into the ... » read more

Market And Tech Inflections Ahead
By Ed Sperling - 27 Jun, 2018 - Comments: 0

Aart de Geus, chairman and co-CEO of Synopsys, sat down with Semiconductor Engineering to talk about the path to autonomous vehicles, industry dis-aggregation and re-aggregation, security issues, and who's going to pay for chips at advanced nodes. SE: All of a sudden we have a bunch of new markets opening up for electronics. We have assisted and autonomous driving, AI and machine learning, v... » read more

Where Is Selective Deposition?
By Mark LaPedus - 25 Jun, 2018 - Comments: 4

For years, the industry has been working on an advanced technology called area-selective deposition for chip production at 5nm and beyond. Area-selective deposition, an advanced self-aligned patterning technique, is still in R&D amid a slew of challenges with the technology. But the more advanced forms of technology are beginning to make some progress, possibly inching closer from the la... » read more

Quantum Computing Becoming Real
By Ed Sperling - 21 Jun, 2018 - Comments: 4

Quantum computing will begin rolling out in increasingly useful ways over the next few years, setting the stage for what ultimately could lead to a shakeup in high-performance computing and eventually in the cloud. Quantum computing has long been viewed as some futuristic research project with possible commercial applications. It typically needs to run at temperatures close to absolute zero,... » read more

Dealing With Resistance In Chips
By Mark LaPedus - 21 Jun, 2018 - Comments: 2

Chipmakers continue to scale the transistor at advanced nodes, but they are struggling to maintain the same pace with the other two critical parts of the device—the contacts and interconnects. That’s beginning to change, however. In fact, at 10nm/7nm, chipmakers are introducing new topologies and materials such as cobalt, which promises to boost the performance and reduce unwanted resist... » read more

Big Trouble At 3nm
By Mark LaPedus - 21 Jun, 2018 - Comments: 0

As chipmakers begin to ramp up 10nm/7nm technologies in the market, vendors are also gearing up for the development of a next-generation transistor type at 3nm. Some have announced specific plans at 3nm, but the transition to this node is expected to be a long and bumpy one, filled with a slew of technical and cost challenges. For example, the design cost for a 3nm chip could exceed an eye-p... » read more

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