Closing The Test And Metrology Gap In 3D-IC Packages


The industry is investing in more precise and productive inspection and testing to enable advanced packages and eventually, 3D ICs. The next generations of aerospace, automotive, smartphone, and wearable tech most likely will be powered by multiple layers of intricately connected silicon, a stark departure from the planar landscapes of traditional integrated circuits. These 3D-ICs, compos... » read more

Fingerprinting Chips For Traceability


Semiconductor components increasingly require unclonable and tamper resistant identifiers, which are especially necessary as devices become increasingly heterogeneous collections of chiplets and subsystems. These fingerprints provide traceability, which contributes to process improvements and yield learning and enable tracking for a tightly managed supply chain. While some of this technology... » read more

Security Becoming Core Part Of Chip Design — Finally


Security is shifting both left and right in the design flow as chipmakers wrestle with how to build devices that are both secure by design and resilient enough to remain secure throughout their lifetimes. As increasingly complex devices are connected to the internet and to each other, IP vendors, chipmakers, and systems companies are racing to address existing and potential threats across a ... » read more

Auto Network Speeds Rise As Carmakers Prep For Autonomy


In-vehicle networks are starting to migrate from domain architectures to zonal architectures, an approach that will simplify and speed up communication in a vehicle using fewer protocols, less wiring, and ultimately lower cost. Zonal architectures will partition vehicles into zones that are more manageable and flexible, but getting there will take time. There is so much legacy technology in ... » read more

AI Races To The Edge


AI is becoming increasingly sophisticated and pervasive at the edge, pushing into new application areas and even taking on some of the algorithm training that has been done almost exclusively in large data centers using massive sets of data. There are several key changes behind this shift. The first involves new chip architectures that are focused on processing, moving, and storing data more... » read more

Startup Funding: November 2023


November was a banner month for quantum computing startups, with two raising rounds of $100 million for their superconducting and silicon spin qubit technology. Another significant round went to a company developing photonic-based systems. Several other companies drew funding, including one applying quantum sensors to semiconductor inspection. Sizeable funding also went to an autonomous tran... » read more

AI Accelerator Architectures Poised For Big Changes


AI is driving a frenzy of activity in the chip world as companies across the semiconductor ecosystem race to include AI in their product lineup. The challenge now is how to make AI run faster, use less energy, and to be able to leverage it from the edge to the data center — particularly with the rollout of large language models. On the hardware side, there are two main approaches for accel... » read more

System State Challenges Widen


Knowing the state of a system is essential for many analysis and debug tasks, but it's becoming more difficult in heterogeneous systems that are crammed with an increasing array of features. There is a limit as to how many things engineers can keep track of, and the complexity of today's systems extends far beyond that. Hierarchy and abstraction are used to help focus on the important aspect... » read more

EDA Pushes Deeper Into AI


EDA vendors are ramping up the use of AI/ML in their tools to help chipmakers and systems companies differentiate their products. In some cases, that means using AI to design AI chips, where the number and breadth of features and potential problems is exploding. What remains to be seen is how well these AI-designed chips behave over time, and where exactly AI benefits design teams. And all o... » read more

3D-ICs May Be The Least-Cost Option


When 2.5D and 3D packaging were first conceived, the general consensus was that only the largest semiconductor houses would be able to afford them, but development costs are quickly coming under control. In some cases, these advanced packages actually may turn out to be the lowest-cost options. With stacked die [1], each die is considered to be a complete functional block or sub-system. In t... » read more

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