Anatomy Of A System Simulation


The semiconductor industry has greatly simplified analysis by consolidating around a small number of models and abstractions, but that capability is breaking down both at the implementation level and at the system level. Today, the biggest pressure is coming from the systems industry, where the electronic content is a small fraction of what must be integrated together. Systems companies tend... » read more

Rethinking Design, Workflow For 3D


In the 3D world, where NAND has hundreds of layers and packages come in intricate stacks, fresh graduates and veteran engineers alike are being confronted with design challenges that require a rethinking of both classic designs and traditional workflows, but without breaking the laws of physics. “There are pockets of things that have been on 3D for quite some time,” said Kenneth Larson, ... » read more

Making Connections In 3D Heterogeneous Integration


Activity around 3D heterogeneous integration (3DHI) is heating up, driven by growing support from governments, the need to add more features and compute elements into systems, and a widespread recognition that there are better paths forward than packing everything into a single SoC at the same process node. The leading edge of chip design has changed dramatically over the last few years. Int... » read more

Navigating EDA Vendor Cloud Options


Experts at the Table: Semiconductor Engineering sat down to discuss the challenges of cost-dependent cloud decisions, and how to navigate between different EDA vendor clouds options with Philip Steinke, fellow, CAD infrastructure and physical design at AMD; Mahesh Turaga, vice president of business development for cloud at Cadence Design Systems; Richard Ho, vice president hardware engineering ... » read more

Gearing Up For Hybrid Bonding


Hybrid bonding is becoming the preferred approach to making heterogeneous integration work, as the semiconductor industry shifts its focus from 2D scaling to 3D scaling. By stacking chiplets vertically in direct wafer-to-wafer bonds, chipmakers can leapfrog attainable interconnection pitch from 35µm in copper micro-bumps to 10µm or less. That reduces signal delay to negligible levels and e... » read more

Big Changes Ahead For Photomask Technology


The move to curvilinear shapes on photomasks is gaining steam after years of promise as a way of improving yield, lowering defectivity, and reducing wasted space on a die — all of which are essential for both continued scaling and improved reliability in semiconductors. Interest in this approach ran high at this year's SPIE Photomask Technology + EUV Lithography Conference. Put simply, cur... » read more

Wirebonding Is Here To Stay


Few technologies in semiconductor manufacturing have stood the test of time as steadfastly as wirebonding. This process, which involves electrically connecting semiconductor devices to their packages, has been a cornerstone of the electronics industry since the beginning of the electronics industry. Like everything else in the semiconductor market, wirebonding technologies have changed over ... » read more

Heterogeneous Integration Finding Its Footing


Semiconductor Engineering sat down to discuss heterogeneous integration with Dick Otte, president and CEO of Promex Industries; Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology; Shekhar Kapoor, senior director of product management at Synopsys; John Park, product management group director in Cadence's Custom IC & PCB Group; and Tony Mastroianni, advanced packagin... » read more

Why Using Commercial Chiplets Is So Difficult


Experts at the Table: Semiconductor Engineering sat down to discuss use cases and challenges for commercial chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts... » read more

Chip Industry Talent Shortage Drives Academic Partnerships


Universities around the world are forming partnerships with semiconductor companies and governments to help fill open and future positions, to keep curricula current and relevant, and to update and expand skills for working engineers. Talent shortages repeatedly have been cited as the number one challenge for the chip industry. Behind those concerns are several key drivers, and many more dom... » read more

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