category: Top Stories

category: IoT, Security & Automotive

Challenges Grow For Creating Smaller Bumps For Flip Chips
By Anne Meixner - 18 May, 2023 - Comments: 0

New bump structures are being developed to enable higher interconnect densities in flip-chip packaging, but they are complex, expensive, and increasingly difficult to manufacture. For products with high pin counts, flip-chip [1] packages have long been a popular choice because they utilize the whole die area for interconnect. The technology has been in use since the 1970s, starting with IBM�... » read more

Managing Yield With EUV Lithography And Stochastics
By Katherine Derbyshire - 18 May, 2023 - Comments: 1

Identifying issues that actually affect yield is becoming more critical and more difficult at advanced nodes, but there is progress. Although they are closely related, yield management and process control are not the same. Yield management seeks to maximize the number of functioning devices at the end of the line. Process control focuses on keeping each individual device layer within its des... » read more

Machine Vision Plus AI/ML Adds Vast New Opportunities
By John Koon - 17 May, 2023 - Comments: 0

Traditional technology companies and startups are racing to combine machine vision with AI/ML, enabling it to "see" far more than just pixel data from sensors, and opening up new opportunities across a wide swath of applications. In recent years, startups have been able to raise billions of dollars as new MV ideas come to light in markets ranging from transportation and manufacturing to heal... » read more

How Metrology Tools Stack Up In 3D NAND Devices
By Laura Peters - 15 May, 2023 - Comments: 0

Multiple innovations in semiconductor processing are needed to enable 3D NAND bit density increases of about 30% per year at ever-decreasing cost per bit, all of which will be required to meet the nonvolatile storage needs of the big data era. 3D NAND is the first truly three-dimensional device in production. It is both a technology driver for new metrology methods and a significant part of ... » read more

Holistic Power Reduction
By Brian Bailey - 11 May, 2023 - Comments: 0

The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power no longer can be just about making hardware more efficient. Tools and methodologies are in place for most of the power-saving opportunities, from RTL down through implementation, and portions of the semiconductor industry already a... » read more

Making Tradeoffs With AI/ML/DL
By Ann Mutschler - 11 May, 2023 - Comments: 0

Machine learning, deep learning, and AI increasingly are being used in chip design, and they are being used to design chips that are optimized for ML/DL/AI. The challenge is understanding the tradeoffs on both sides, both of which are becoming increasingly complex and intertwined. On the design side, machine learning has been viewed as just another tool in the design team's toolbox. That's s... » read more

Rethinking Engineering Education In The U.S.
By Karen Heyman - 11 May, 2023 - Comments: 8

The CHIPS Act, as well as the ongoing need for talent, is causing both industry and academia in America to rethink engineering education, resulting in new approaches and stronger partnerships. As an example, Arizona State University (ASU) now has a Secure, Trusted, and Assured Microelectronics Center (STAM). The center offers an interdisciplinary approach to learning secure and trusted semic... » read more

Designing Crash-Proof Autonomous Vehicles
By John Koon - 10 May, 2023 - Comments: 0

Autonomous vehicles keep crashing into things, even though ADAS technology promises to make driving safer because machines can think and react faster than human drivers. Humans rely on seeing and hearing to assess driving conditions. When drivers detect objects in front of the vehicle, the automatic reaction is to slam on the brakes or swerve to avoid them. Quite often drivers cannot react q... » read more

Pinpointing Timing Delays Can Improve Chip Reliability
By Anne Meixner - 09 May, 2023 - Comments: 0

Growing pressure to improve IC reliability in safety- and mission-critical applications is fueling demand for custom automated test pattern generation (ATPG) to detect small timing delays, and for chip telemetry circuits that can assess timing margin over a chip's lifetime. Knowing the timing margin in signal paths has become an essential component in that reliability. Timing relationships a... » read more

3D Structures Challenge Wire Bond Inspection
By Karen Heyman - 09 May, 2023 - Comments: 1

Adding more layers in packages is making it difficult, and sometimes impossible, to inspect wire bonds that are deep within the different layers. Wire bonds may seem like old technology, but it remains the bonding approach of choice for a broad swath of applications. This is particularly evident in automotive, industrial, and many consumer applications, where the majority of chips are not de... » read more

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