category: Unlisted Blogs

category: IoT, Security & Automotive

3 Ways To Improve Design Collaboration: Part 2
By Amit Varde - 04 Jun, 2020 - Comments: 0

In the last blog in this series, we talked about how VDD can help design and layout engineers work more efficiently. Communicating precise and accurate information is a key factor in improving productivity, estimates, and the planning process. Visualizing the changes makes it easier to follow the technical details. The ECO (Engineering Change Order) phase is an important phase in the lifecycle... » read more

eFPGA As Fast And Dense As FPGA, On Any Process Node
By Geoff Tate - 04 Jun, 2020 - Comments: 0

A challenge for eFPGA when we started Flex Logix is that there are many customers and applications, and they all seemed to want eFPGA on different foundries, different nodes and different array sizes. And everyone wanted the eFPGA to be as fast and as dense as FPGA leaders’ on the same node. Oh, and customers seem to wait to the last minute then need the eFPGA ASAP. Xilinx and Altera (Intel ... » read more

A Different View On Debugging
By Hagai Arbel - 01 Jun, 2020 - Comments: 0

The classic approach to improve an engineering task that is becoming too complex due to its size and detail is to raise the abstraction of design representation. In this way we plan cities, build aircraft and plan 500M gate SoCs. For example, there is no way an ASIC design could go beyond a few thousand logic gates without shifting abstraction to the Register Transfer Level (RTL) and leveragin... » read more

Connecting Emulated Designs To Real PCIe Devices
By Krzysztof Szczur - 28 May, 2020 - Comments: 0

These days verification teams no longer question whether hardware assisted verification should be used in their projects. Rather, they ask at which stage they should start using it. Contemporary System-on-Chip (SoC) designs are already sufficiently complex to make HDL simulation a bottleneck during verification, without even mentioning hardware-software co-verification or firmware and softwa... » read more

Domain-Specific Processors Enable More Than Moore
By Roddy Urquhart - 28 May, 2020 - Comments: 0

Last month was the 55th anniversary of Gordon Moore’s famous paper Cramming more components onto integrated circuits. He took a long-term view of the trends in integrated circuits being implemented using successively smaller feature sizes in silicon. Since that paper, integrated circuit developers have been relying on three of his predictions: The number of transistors per chip increas... » read more

FPGA Equivalence Checking For A Nuclear Safety Controller
By Rob van Blommestein - 28 May, 2020 - Comments: 0

Every chip development team wants to find and fix all the bugs they possibly can in pre-silicon verification. Turning a chip to fix issues found in the bring-up lab incurs high costs and product delays; bugs found in the field are even more expensive to repair. But for some applications, including military/aerospace, implanted medical devices, and autonomous vehicles, the consequences of a faul... » read more

Fan-Out Wafer-Level Packaging And Copper Electrodeposition
By Steven T. Mayer - 21 May, 2020 - Comments: 0

By Steven T. Mayer, Bryan Buckalew, and Kari Thorkelsson As integrated circuit designers bring more sophisticated chip functionality into smaller spaces, heterogeneous integration, including 3D stacking of devices, becomes an increasingly useful and cost-effective way of mixing and connecting various functional technologies. One of the heterogeneous integration platforms gaining increased ac... » read more

Remotely Performing IC Validation
By Tommy Mullane - 20 May, 2020 - Comments: 0

One of the key stages in designing any chip is the testing you do when you get the first silicon back. This is where you finally see the results of all your careful work and determine whether the chip is performing as designed, and as simulation told you it would. This is known as IC validation. The focus of validation is on functional test – checking that the chip in silicon meets the origin... » read more

Monitoring For In-Die Process Speed Detection
By Richard McPartland - 14 May, 2020 - Comments: 0

Chip designers working on advanced nodes typically include a fabric of sensors spread across the die for a number of very specific reasons. In this, the second of a three-part blog series, we explore some of the key applications and benefits of these types of sensing solutions. In this installment, the focus is In-Die Process Speed Detection and why understanding in-chip process speed detecti... » read more

Doing More For Less With Upgraded LON Networks
By Apurba Pradhan - 14 May, 2020 - Comments: 0

At Adesto, we talk a lot about the importance of embracing all IoT communications protocols. We believe that our customers and their customers can derive great benefit from building and industrial control solutions that connect to industrial field bus protocols such as BACnet, LON and Modbus, as well as IP-based protocols – especially when those solutions are enabled to work seamlessly togeth... » read more

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