Tech Talk: Formal Discussion

By Brian Bailey - 28 Jan, 2015 - Comments: 0

Pratik Mahajan, senior R&D manager for verification at Synopsys, talks about how to use simulation plus formal verification. [youtube vid=TjO8up0nPGg] » read more

Tech Talk: Formal Practices

By Brian Bailey - 24 Nov, 2014 - Comments: 0

[getentity id="22147" comment="Oski Technology"] president and CEO [getperson id="11074" comment="Vigyan Singhal"] defines [getkc id="33" comment="formal verification"], where to start, and how and when to use it. [youtube vid=pxoSWtb4xIw] » read more

Tech Talk: Formal Verification

By Brian Bailey - 03 Nov, 2014 - Comments: 0

Praveen Tiwari, senior R&D manager for verification at Synopsys, talks with Semiconductor Engineering about when to use formal verification, why it isn't limited to small parts of the design, how to reduce complexity, bounded proofs, and bug hunting. [youtube vid=v8CoIAWU1XA] » read more

Tech Talk: IP Integration Part 2

By Ed Sperling - 27 Oct, 2014 - Comments: 0

Sonics CTO Drew Wingard talks about the challenges of integrating IP into SoCs in this second of two parts. [youtube vid=ipQkPjJMcgY] » read more

Tech Talk: SW vs. HW

By Ed Sperling - 21 Oct, 2014 - Comments: 0

Arteris CTO Craig Forest talks about what gets done in hardware, what gets done in software, and where the two worlds meet and sometimes collide. [youtube vid=-EbUTZL0uz8] » read more

Tech Talk: IP Integration

By Ed Sperling - 27 Sep, 2014 - Comments: 0

Sonics CTO Drew Wingard talks about the challenges of integrating IP into SoCs and what typically goes wrong. [youtube vid=T1FAPDqIJK8] » read more

Tech Talk: Photonics, Take 2

By Ed Sperling - 23 Jun, 2014 - Comments: 0

Mentor Graphics’ John Ferguson explains why light is getting so much attention for inter-chip communications, where it excels, and why it has limitations. This is the second part in a two-part series. [youtube vid=4-5FbxIpIk4] To view part 1, click here. » read more

Tech Talk: The New Cost Per Gate Equation

By Ed Sperling - 22 May, 2014 - Comments: 1

eSilicon's Javier DeLaCruz talks with Semiconductor Engineering about new types of interposers, why just shrinking features is doomed, and what progress has been made in building 2.5D chips. [youtube vid=akj8r8nNktM] » read more

Tech Talk: Silicon Photonics

By Ed Sperling - 21 May, 2014 - Comments: 2

Mentor Graphics' John Ferguson explains why light is getting so much attention for inter-chip communications, where it excels, and why it has limitations. This is the first part in a two-part series. [youtube vid=0ydkDmrSrF4] » read more

Tech Talk: Changes In Verification

By Ed Sperling - 27 Jan, 2014 - Comments: 0

Roger Hughes, director of strategic accounts at Real Intent, talks about what's changing in verification as design complexity increases and where engineers typically make mistakes. [youtube vid=0SE97LvCilo] » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

category: Videos

category: IoT, Security & Automotive