category: Videos

category: IoT, Security & Automotive

Monitoring Performance From Inside A Chip
By Ed Sperling - 01 Jun, 2021 - Comments: 0

Deep data, which is generated inside the chip rather than externally, is becoming more critical at each new process node and in advanced packages. Uzi Baruch, chief strategy officer at proteanTecs, talks with Semiconductor Engineering about using that data to identify potential problems before they result in failures in the field, and why it's essential to monitor these devices throughout their... » read more

Next-Gen SerDes Roadmap
By Ed Sperling - 25 May, 2021 - Comments: 0

An explosion in data is causing a series of successive bottlenecks in the data center. Priyank Shukla, product marketing manager for high-speed SerDes IP at Synopsys, digs into the performance roadmap for moving data within server racks and between different racks, where the bottlenecks are today, and how they will be addressed in the future. Related SerDes Knowledge Center Top stories... » read more

Shifting Auto Architectures
By Ed Sperling - 29 Apr, 2021 - Comments: 0

Domain controllers and gateways are being replaced by central processing modules and zonal gateways to handle all of the data traffic in a vehicle. Ron DiGiuseppe, automotive IP segment manager at Synopsys, talks with Semiconductor Engineering about how automotive applications are changing, what that means for engineering teams, and how they will shift as AI is increasingly deployed. » read more

Next-Gen Design Challenges
By Ed Sperling - 20 Apr, 2021 - Comments: 0

As more heterogeneous chips and different types of circuitry are designed into one system, that all needs to be simulated, verified and validated before tape-out. Aveek Sarkar, vice president of engineering at Synopsys, talks with Semiconductor Engineering about the intersection of scale complexity and systemic complexity, the rising number of corners, and the reduced margin with which to buffe... » read more

Network Interface Card Evolution
By Ed Sperling - 31 Mar, 2021 - Comments: 0

Longer chip lifetimes, more data to process and move, and a slowdown in the rate of processor improvements has created a series of constantly shifting bottlenecks. Kartik Srinivasan, director of data center marketing at Xilinx, looks at one of those bottlenecks, the network interface card, why continuous enhancements and changes will be required, and how to extend the life of NICs as the networ... » read more

Customized Micro-Benchmarks For HW/SW Performance
By Ed Sperling - 23 Mar, 2021 - Comments: 0

Raw performance used to be the main focus of benchmarks, but they may have outlived their usefulness for many applications. Dana McCarty, vice president of sales and marketing for AI Inference Products at Flex Logix, talks about why companies need to develop and utilize their own specific models to accurately gauge hardware and software performance, which can be slowed by bottlenecks in I/O and... » read more

Changing The Rules For Chip Scaling
By Ed Sperling - 10 Mar, 2021 - Comments: 0

Aki Fujimura, CEO of D2S, talks with Semiconductor Engineering about the incessant drive for chip density, how to improve that density through other means than just scaling, and why this is so important for the chip industry. » read more

Security In FPGAs And SoCs
By Ed Sperling - 23 Feb, 2021 - Comments: 0

Chip security is becoming a bigger problem across different markets, with different emerging standards and more sophisticated attacks. Jason Moore, senior director of engineering at Xilinx, talks with Semiconductor Engineering about current and future threats and what can be done about them. » read more

Securing ICs With Information Flow Analysis
By Ed Sperling - 16 Feb, 2021 - Comments: 0

Following the data has new meaning when it comes to security. Alric Althoff, senior hardware security engineer at Tortuga Logic, talks about tracking the flow of data through a hardware design over time, including what happens with roots of trust, how this works with existing tools and methodologies, and what to think about when tracing potential security risks. » read more

Better Quality RTL
By Ann Mutschler - 02 Feb, 2021 - Comments: 0

How do you measure the quality of RTL? Philippe Luc, director of verification at Codasip, talks about identifying bugs, improving the overall quality of the verification, what happens when different blocks are used in a design, and how to improve efficiency in the verification process. » read more

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