Data Overload In The Data Center


Dealing with increasing volumes of data inside of data centers requires an understanding of architectures, the flow of data between memory and processors, bandwidth, cache coherency and new memory types and interfaces. Gary Ruggles, senior product marketing manager at Synopsys, talks about how these systems are being revamped to improve performance and reduce power. » read more

IP Safe Enough To Use In Cars


IP that is used for functional safety needs to respond to events that can happen, whether those are planned or random. Jody Defazio, vice president of IP quality and functional safety at Synopsys, talks with Semiconductor Engineering about ASIL compliance, what the different levels mean, and the impact of using chips developed at the most advanced process nodes in automotive applications. » read more

Silicon Lifecycle Management


How do you track, measure and ensure reliability over the lifetime of a chip, regardless of how or where it is used? Steve Pateras, senior director of marketing for test products at Synopsys, drills down into the impact of hardware-software co-design, over-the-air updates, the expected lifetime of designs, and how the various monitors and sensors are used to track environmental, structural and ... » read more

Faster Inferencing At The Edge


Cheng Wang, senior vice president of engineering at Flex Logix, talks about inferencing at the edge, what are some of the main considerations in designing and choosing an inferencing chip, why programmability and modularity are important, and how hardware-software co-design with algorithms can improve performance and power. » read more

Virtual Fabrication At 7/5/3nm


David Fried, vice president of computational products at Lam Research, digs into virtual fabrication at the most advanced nodes, how to create models using immature processes at new nodes, and how to fuse together data from multiple different silos. » read more

112G SerDes Reliability


Priyank Shukla, product marketing manager at Synopsys, digs into 112Gbps SerDes, why it’s important to examine the performance of these devices in the context of a system, what is acceptable channel loss, and how density can affect performance, power and noise. » read more

Challenges At 3/2nm


David Fried, vice president of computational products at Lam Research, talks about issues at upcoming process nodes, the move to EUV lithography and nanosheet transistors, and how process variation can affect yield and device performance. » read more

AI Inference Acceleration


Geoff Tate, CEO of Flex Logix, talks about considerations in choosing an AI inference accelerator, how that fits in with other processing elements on a chip, what tradeoffs are involved with reducing latency, and what considerations are the most important. » read more

Memory Access In AI Systems


Memory access is a key consideration in AI system design. Ron Lowman, strategic marketing manager for IP at Synopsys, talks about how memory affects overall power consumption, why partitioning of on-chip and off-chip is so critical to performance and power, and how this changes from the cloud to the edge. » read more

eFPGAs Vs. FPGA Chiplets


Embedded FPGAs are a totally different concept from discrete FPGA chiplets, and that is reflected in size, cost, power and performance. Geoff Tate, CEO of Flex Logix, talks about which applications are best for each, how each maximizes power and performance, and why choices will vary greatly by application. Related eFPGA Knowledge Center FPGA Knowledge Center Increasing EFPGA Densit... » read more

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