A single, well-integrated flow facilitates collaboration across design teams.
Design flows are currently fragmented due to the use of poorly connected EDA tools for various design tasks. Fragmented flows are unable to meet new challenges such as increased system and circuit complexity, stricter bandwidth requirements, smaller device sizes, and changing packaging needs. In this white paper, we look at how the Cadence Virtuoso RF Solution provides a single, well-integrated flow that can facilitate collaboration across design teams to address these challenges and produce the next generation of high-frequency products.
Introduction
Design flows have been disjointed since the introduction of the first circuit simulation tools. Flows have been further fragmented with the advent of specialized tools, such as those for electromagnetic analysis. Circuit simulation, layout, and electromagnetic analysis have been performed using separate tools and often by different design specialists. Earlier, designs were considerably simpler and common interface points could be defined within a subsystem. These designs led to single in-line packages mounted on high-frequency boards, such as alumina or fiberglass. Older rudimentary packaging techniques have given way to a host of advanced techniques, including microbumps, stacked die, interposers, fan-out, multi-layer substrates, and so on, allowing for more complex design stackups.
Figure 1: Design stackup
Let us consider the stacked designs illustrated in Figure 1. The designs act as a single interacting subsystem. Seen from a high-frequency design standpoint, electrical coupling in one area can easily impact other areas in the stack. Different design teams still use disparate EDA tools for various design aspects of electronic products.
Read more here.
 |
 |
 |
 |
 |
 |
 |
 |
 |
Leave a Reply