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Designing Heterogeneous AI Acceleration SoCs

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A new technical paper titled “Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience” was published by researchers at University of Bologna.

Abstract

“Since 2013, the PULP (Parallel Ultra-Low Power) Platform project has been one of the most active and successful initiatives in designing research IPs and releasing them as open-source. Its portfolio now ranges from processor cores to network-on-chips, peripherals, SoC templates, and full hardware accelerators. In this article, we focus on the PULP experience designing heterogeneous AI acceleration SoCs – an endeavour encompassing SoC architecture definition; development, verification, and integration of acceleration IPs; front- and back-end VLSI design; testing; development of AI deployment software.”

Find the technical paper here. December 2024.

Conti, Francesco, Angelo Garofalo, Davide Rossi, Giuseppe Tagliavini, and Luca Benini. “Open-Source Heterogeneous SoCs for AI: The PULP Platform Experience.” arXiv preprint arXiv:2412.20391 (2024).



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