eFPGA Gives You FPGA Speed And Density At Much Less Cost And Power

Characteristics of an ideal embedded FPGA.


FPGAs are everywhere in all types of systems for their flexibility and quick time to market.

As your volumes grow and you consider an ASIC to cut cost and power, you can now incorporate an embedded FPGA to continue to give you flexibility for the parts of your chip that need to adapt for changing standards, improving algorithms and customer optimizations.

If you are an SoC designer, you can benefit from eFPGA as well to implement the parts of your chip that need to be adaptable for change.

FPGA is full-custom design with maximum metal layers

FPGA companies sell billions of dollars of FPGAs and are very successful. Their design model is to build a family of FPGAs in a given node using a design team of 50-100 people and they take 2-3 years to do the design.

Each member of the FPGA family has a mix of LUTs, DSP MACs and BRAM. Some are bigger, some are smaller. If you want just LUTs, you can’t get it because of the high cost of developing the advanced node chips.

The FPGA circuitry is full custom design using SPICE modelling. It is not standard cell based. They do this to get maximum performance on leading edge nodes.

The mesh interconnect network always uses all of the available metal layers in the process node in order to get acceptable utilization.

Not all eFPGA are the same

Some eFPGA is provided by FPGA companies that use the traditional approach. They only support a small number of nodes, typically what their FPGA is available in. And their metal layer requirement is relatively high – higher than what most high volume SoC companies use. But they can achieve FPGA performance and LUT density (in the same process node).

Some eFPGA is provided by companies using a compiler approach using standard cells – but they use traditional FPGA mesh interconnect, which scales with the square of the number of LUTs/MACs in the interconnect fabric. Because of their interconnect the area is typically 2x that of FPGA chips for the same amount of LUTs/MACs/BRAMs and the performance is less.

The ideal eFPGA has these characteristics:

  • It uses the fewest number of metal layers and is compatible with the metal stacks of most customers, including the high volume, cost sensitive customers
  • It can be optimized to give you small or large arrays as needed with the mix of LUTs, DSP MACs and BRAMs that you need for your application
  • It has density and performance like the FPGA companies, in the same process node
  • It can be developed on any node using a small team in a short time frame

Flex Logix’ EFLX eFPGA has all of these characteristics because we use standard cells and we have a patented interconnect, proven in >20 chips in silicon, that uses half the transistors and half the metal layers of a traditional FPGA mesh interconnect.

We also have patented technologies that allow us to build our eFPGA arrays up from building blocks to tiles to arrays in a way that minimizes engineering cost and time.

As a result, EFLX eFPGA is now licensed by >20 customers (Renesas, Boeing, AFLR, Datung…) for >40 chips with over 20 chips already built with first time success. EFLX eFPGA is available or in development now for 9 major nodes (TSMC 40, 28, 16/12, 7/6, 5/4, 3 and GF 22, 12) and many derivative nodes.

We have customers like Renesas using us for tiny 1mm x 1mm Forge FPGAs with 1K LUTs at microWatts; and other customers like Socionext using us for 500MHz worst case operation of 100K LUTs in 7nm.

Applications and use cases for eFPGA

We are working with customers using eFPGA for a wide range of applications and use cases. Many of them are not yet public so we cannot disclose exactly what they use eFPGA for until they are.

Applications and use cases for eFPGA include:

  1. Programmable GPIO enabling a processor to support any type of UART, SPI, etc.

  1. Customer programmable eFPGA on a processor bus – this is for customers who today use FPGA with a processor: their processor vendors will integrate the eFPGA for them so they can maintain the functionality, flexibility and speed of FPGA and also cut latency by replacing a PCIe bus connection with an AXI bus
  2. Tiny FPGAs like Renesas Forge FPGA

  1. Fintech high speed trading accelerators
  2. Encryption/decryption/security
  3. 5G packet parsing acceleration
  4. Data center
  5. Software defined radio
  6. Digital signal processing
  7. Software-defined NICs (network interface chips)
  8. Programmable asynchronous control for rapid response, low power PMICs

… and many more.

eFPGA is ready for prime time

Customers are using eFPGA for one of two reasons:

  1. Integrating an expensive and power-hungry FPGA into their own SoC for a 10x cost/power reduction
  2. Adding eFPGA to their chip to give flexibility for changing standards, improving algorithms and customer optimization requests.

Over 20 customers are already building or designing >40 chips using eFPGA with many more in evaluation. Don’t let your competitors beat you to deploying the value of eFPGA to gain market share. Contact us at [email protected] to learn more or visit our website flex-logix.com.

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