Fixing DP Errors: Colors Or Rings

Double patterning is a necessity at 20nm, but it brings a number of new errors for the design team to deal with.

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By Ann Steffora Mutschler

With the move to the 20nm manufacturing node, double patterning (DP) became a requirement. In addition, topology changes occurred that demanded very regular structures, marking a significant departure from 28nm design. As a result of this new approach, new errors are popping up, such as DP violation loops, odd cycle violations and anchor path violations.

Certainly, double patterning was the biggest change and the biggest concern on the designer’s minds when they began moving to 20nm, observed David Abercrombie, advanced physical verification methodology program manager at Mentor Graphics. They wanted to know what double patterning was and how to deal with it.

“Also, for the foundries themselves, they wanted to know how were they going to find provide a solution that was viable to the users,” Abercrombie said. “That’s certainly been the bulk of the questions we’ve gotten with the move to 20 nm and below—things related to double patterning, finding and fixing errors, how to deal with parasitic extraction or LVS or whatever, place and route and other things associated with double patterning. It’s certainly a new and different kind of error to deal with.”


The nature of the difference

Most design rule checks typically are associated with either a single polygon or its neighbor. That includes width or spacing or area, which can be complex. For instance, the space is dependent on the width, the run length, etc., but it’s still basically a neighbor-to-neighbor interaction or the layout of the shape itself.

“With odd cycles and anchor path errors, it’s now an issue of the network of interacting shapes—multiple shapes that can be spread over long distances and how they interact with each other in the network of spacings to form this odd cycle or this anchor path,” said Abercrombie. “It’s very different than the traditional rule in that sense. In some ways people have learned to think about it more like an antenna rule that is network-based. It’s not conductivity-based, it’s spacing-based, but it’s about the network of shapes and the spacings.”

This is a whole new level of complexity for designers to deal with. “If you’ve seen 20nm designs from customers, they’re different from 28nm and the reason for that is because of the core fundamental issue in double patterning of conflicts, where one defines a conflict as a native conflict or a loop conflict,” said Manoj Chacko, product marketing director at Cadence noted. “A native conflict is something that you can detect but cannot fix without a design change. That means the designer has to make a design change.”

Consider a loop conflict, for example. If you have four polygons, for example, and two masks for double patterning at 20nm, then each polygon is split into two masks and four polygons is split into eight. That works fine in a very regular layout, but not all layouts are so regular.

“This seems kind of reasonable given that you can assign four polygons eight colors, but in reality it’s a little different because it depends on the proximity of the polygons to the others and so on,” Chacko said. “If you had nine polygons because of an L joint, for example, even if you have to split four into eight but the eighth polygon is not straight, it’s an L—now the L basically may become two colors again, making nine. This is called a loop problem, where you have the eighth polygon that is split into 2 colors. This is the problem that designers see. It doesn’t require systematic changes but it does require identification of the loop, and then there are methods to fix it.”

One other problem is when you think of that last ninth polygon as an L, where at the corner of the L where the two lines join. That could make a split. The foundries decide on the split based on their process. They may not do a split at a joint. They may do it on a straighter edge. But when they make the joint, there is an overlay of these two masks. If you think of that ninth polygon – that eighth polygon that got split into two pieces—they will expose first one joint, then etch it, then expose the remaining portion of that L, then etch it. Now you have to make sure these two exposures make that one L that the customer wants. The idea is that the overlay is a problem. In manufacturing, it’s called overlay. In design, it’s called stitching—meaning they have to make sure there’s enough overlap at the split/splice location. So that is another issue that design tools have to give good feedback about.

These coloring issues are exactly why Mentor Graphics looks at this differently, Abercrombie said. “Displaying the error as a ring is so much more productive than showing the colors because this was the initial mental struggle [with double patterning,] and the request that came up most was, ‘I want to see the colors.’ That was the first thing designers said—only the colors. And I said, ‘Why do you want to see the colors?’ ‘So I know what to fix.’ Seeing the colors is actually a misleading thing. If you imagine an odd cycle there is no legal way to color it. That’s the problem. That’s why it’s an error. There is an odd number of things interacting, and you have two colors and you can’t divide and odd number by an even number or you get a remainder. So you can’t color them alternating colors in an odd cycle, because somewhere in that cycle you’re going to end up with the same two colors next to each other. When you ask the tool to show you colors, inherently the tool can only show you the wrong colors because in that configuration there are no legal colors.”

A second problem is that there are many, many different wrong colorings that could be shown because there is no right one, so the selection of which one to show is completely arbitrary.

This is why Mentor approaches this type of error with a ring scenario. “By showing colors, there could be a random chance that I showed you that one error that may be the hardest one to fix and hence I’ve pushed you down a path of most work,” Abercrombie said. “By ignoring the colors—not showing the colors, if at all possible because it’s just going to mentally push you in a direction—look at the ring and look at the options that it is showing you as a benefit. Now you have multiple choices and you can do what is best for you.”

Not so scary

Mentor’s Abercrombie asserted that as scary as it is for designers to learn something new, “like anything else once they start dealing with it they learned pretty quick and they found it’s not those it’s not as overwhelming as they thought.”

And there are even some nice things about double patterning errors, he said, in that although the error can seem large and involve a lot of shapes with a lot of spaces around things, the advantage of it is that you have multiple options for fixing it. In a given odd cycle, for example, you only have to break one separation within the network of polygons that are interacting and it is clean. You don’t have to fix them all. You only have to fix one of them.

“In that way a single error has many ways to fix it and that’s better than a lot of other DRC rules,” he said. “When the check is like ‘me and my neighbor’ and how far away we are—when you only have one option you’ve got to fix that space and that may be difficult because of the ramifications of trying to fix it. When you try to move those edges, or you might have to move vias and other shapes, that could be a very complicated location to fix. But with a DP error, the fact that it’s got multiple options gives some freedom to say, ‘Here’s an odd cycle with five different spaces and there are actually five choices that I can make.’ I can look at which one is easiest for me.”

Saleem Haider, senior director of marketing for physical design and DFM at Synopsys, agreed. “[DP errors], at the highest level, look pretty much the same as a general design rule error. Even without double patterning at 28nm we have a fairly complex set of design rules that the foundries gives us and design implementation has to adhere to those. Ten years ago, pretty much all design rules were somewhat width- and spacing-oriented. Now the rules are very, very complex. Some of them are based on the size of the object itself, and there are spacings from corners and edges and sides, etc., so it’s a fairly complex set of rules.”

Double patterning becomes a part of that, so at the end of the day, a DP violation or a DP error is going to, generically speaking, look just like a design rule error, he said. Just as if there was a design rule error in the design, the foundry would not accept that design because when the design comes into the foundry, one of the first things they do is run design rule checking on it to see if it meets the checking criteria that they specified. If the design doesn’t meet it, they will send that design back to the design team. It’s part of the incoming process. It’s the same for DP.

Like many new technologies, understanding double-patterning errors is just a learning process, Mentor’s Abercrombie concluded. “The foundries first had to figure out what it is they want to provide and support and work with us to make the tool capabilities to do that. Now that they’ve rolled out the decks to the customers it’s been more about educating the customer to overcome that initial shock of something new and get them educated. As soon as they play with it for a little while, it comes pretty fast. They’re smart. For the ones that have already made that move, they are settling in pretty quickly.”

Additional resources:

http://www.mentor.com/solutions/foundry

http://semimd.com/mentor/

http://www.synopsys.com/Tools/Implementation/CapsuleModule/ic_validator_wp.pdf

http://www.synopsys.com/Solutions/EndSolutions/20nmdesign/Documents/20nm-and-beyond-white-paper.pdf