FMEDA-Driven SoC Design Of Safety-Critical Semiconductors

A tool for designing safety-critical semiconductors.


As state-of-the-art electronics propel the automotive, industrial, and aerospace industry into a future of more connectivity and autonomy, the development of safety-compliant semiconductors is critical. The Cadence FMEDA-driven Safety Solution consists of products enhanced for advanced safety analysis, safety verification, and safety-aware implementation for digital driving analog and digital full flows.

Commonly used safety analysis tools such as FMEDA are not integrated with IC design tools or flows. Therefore, there is no formal way to describe and propagate the safety intent captured in FMEDA to the IC design flow driving safety tools accordingly (top-down methodology). Conversely, there is no formal way to back-annotate simulation-based data from a fault injection campaign into the FMEDA (bottom-up methodology) to replace estimated failure rates with more accurate values.

Some key enhancements are necessary to support a top-down and bottom-up safety methodology fully

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