Fractilia: Pattern Roughness Metrology

A new startup has emerged and unveiled a technology that addresses one of the bigger but less understood problems in advanced lithography–pattern roughness.

The startup, called Fractilia, is a software-based metrology tool that analyzes the CD-SEM images of pattern roughness on a wafer. Fractilia, a self-funded startup, is led by Chris Mack and Ed Charrier. Mack, known as the gentleman scientist, has run his own consulting firm, Lithoguru.com, for the last 12 years. Mack is the chief technology officer of Fractilia.

Charrier is the chief executive of the startup. In 1990, Mack founded Finle Technologies, a lithography simulation firm that was acquired by KLA-Tencor in 2000. Charrier was also part of Finle and later was an executive at KLA-Tencor for some time.

Meanwhile, Fractilia is focusing on pattern roughness issues for both optical and extreme ultraviolet (EUV) lithography. Pattern roughness is problematic and for good reason. It is one of the issues that could hinder the eventual insertion of EUV.

In the patterning process at advanced nodes, chipmakers use today’s 193nm immersion lithography scanners and multiple patterning. At 7nm and/or 5nm, the industry hopes to insert EUV. These lithography systems print tiny features on the wafer. During the patterning process, though, the features are not perfectly smooth. This is sometimes called pattern roughness. Pattern roughness describes the amount of variation on the edges of the features.

The main types of pattern roughness include line-edge roughness (LER), linewidth roughness (LWR) and pattern placement roughness (PPR). One issue, LER, is defined as a deviation of a feature edge from an ideal shape.

All told, pattern roughness can impact semiconductor performance and yields at 10nm and below. “We all know that the features are getting smaller, but pattern roughness is not getting smaller. So, pattern roughness is starting to become a larger portion of the patterns that are being printed,” Mack said. “And in all aspects of lithography, it’s becoming a serious issue. It’s really one of those difficult problems that doesn’t quite have a solution yet.”

LER is a big issue in EUV. Generally, EUV has been delayed by the lack of adequate power sources. On top of that, EUV resists are limited in terms of sensitivities. “In EUV, you suffer from yield because of a stochastic phenomenon, line-edge roughness and contact-hole roughness caused by photon shot noise and other sources,” he said.

Among the solutions to the problem is to develop better EUV resists and/or EUV sources with more power. Both solutions, in theory, could reduce LER. But waiting for higher power sources and better resists could delay the insertion of EUV even further.

Another solution is to use today’s EUV scanners and resists. This, in turn, would likely produce features with some roughness, but it’s unclear if these patterns are acceptable in terms of fidelity and yield.

One solution
While pattern roughness remains an issue, Fractilia is solving at least one part of the problem–measuring pattern roughness. “Solutions to measure and minimize it have been elusive,” he said.

Typically, the industry uses a traditional CD-SEM to measure pattern roughness. But as the electrons interact with the resists in tiny patterns, the signal-to-noise ratio becomes an issue and the images are noisy.

This, in turn, produces CD bias, which is the difference between the actual and measured values. “We have pretty much been living with this measurement for a long time, but it is no longer adequate,” he said.

To solve the problem, Fractilia has rolled out its first product—MetroLER. This is a software tool to analyze CD-SEM images for pattern roughness. The tool works with CD-SEMs from Applied Materials, Hitachi and others.

Targeted for both 193nm immersion and EUV, MetroLER makes use of both physics- and statistics-based algorithms. Basically, the tool separates the errors of the CD-SEM from the errors of the lithographic features. “I’m taking out the statistical noise that’s in the SEM and the systematic distortions that are present in the SEM as well. Both of those components are being separated out. What’s left is a truer picture of what’s really on the wafer or what the real roughness is,” Mack said. “In many cases, the value you end up getting for the true roughness of the wafer, or what we call the unbiased roughness, is less than the apparent roughness you see just by measurements from the SEM.”

MetroLER can not only take measurements, but it can also make predictions about the device features. “It will make predictions as to how this roughness will effect device features,” he said.

This is key for EUV. “Good metrology is the starting point for finding the solution for roughness in EUV lithography,” he said. “We don’t have a complete answer (in terms of how to solve the roughness issue). But by seeing what’s on the wafer with clearer eyes, we will have a better idea of what we need to do. That will help people in manufacturing make better decisions about the specs, as well as roughness, and the potential impact of roughness on yield.”

The initial results of MetroLER will be described in technical papers at next week’s SPIE Advanced Lithography Symposium. Fractilia will present papers with GlobalFoundries, KLA-Tencor, Lam Research and Tokyo Electron Ltd. (TEL). MetroLER will begin beta testing in March.

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