Considerations for programmable devices in automotive and industrial applications.
Advances in design and manufacturing technology allow increased factory automation, where tasks are automatically performed by sophisticated equipment such as industrial robots. Manufacturing processes require fail-safe mechanisms to prevent human injury or costly downtime. With increasing sophistication and automation of the manufacturing processes, there is increasing need for error detection and recovery methods. The design of industrial and automotive applications requires the integration of functional safety measures to ensure the system or equipment operates correctly. This includes safe handling of operator errors, hardware failures or environmental changes. These overall functional safety requirements are defined by the ISO 26262 standard for automotive and the IEC 61508 standard for industrial applications. Due to the re-programmability, long lifespans and high processing bandwidth, FPGAs are being used for industrial and automotive designs. This is requiring FPGA designers to provide for the addition of functional safety features within their designs.
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Rising costs and gaps in equipment emerge as technology scales; new tools under development.
Explosion of data is forcing significant changes in where processing is done.
Experts at the Table, part 1: Shrinking features isn’t enough anymore. The big challenge now is how to achieve economies of scale and minimize complex integration issues.
2019 will be a year of change for the semiconductor industry as new fields drive technological advancements.
This new communications standard could transform architectural decisions across the industry, but not right away and not necessarily in obvious ways.
What hoops will designers have to jump through to avoid concurrency bugs?
Why managing power is becoming more difficult, more critical, and much more expensive.
Analog circuitry stopped following Moore’s Law a long time ago, but that hasn’t always helped.
Is it possible to reduce the power consumed by memory by 50%? Yes, but it requires work in the memory and at the architecture level.
Can mixed-signal architectures boost artificial intelligence performance using less power?
When going to a smaller node is no longer an option, how do you get better power performance? Several techniques are possible.
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