Systems & Design

How High-Level Synthesis Was Used To Develop An Image-Processing IP Design From C++ Source Code

Methodology helped accommodate late spec changes on aggressive delivery schedule.


Imagine working long and hard on a design, only to learn that you need to add new (and more complex) functionality a few months before your targeted tapeout. How can you deliver the performance and capabilities expected in the same timeframe? For Bosch, high-level synthesis (HLS) provided the solution. In this paper, we will discuss how HLS technology enabled the team to meet an aggressive schedule on its image-processing IP without any changes to its existing floorplan.

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