Low Power Everywhere

The tradeoffs look remarkably similar—and daunting—at home, at the office, and on an SoC.


By Kiran Vittal
School is over for my kids and the summer holidays are here. We are planning to make minor modifications to our home, which includes installation of recessed lights. LED light bulbs are all over the place in home appliance stores and they claim 85% savings in energy costs with a life span of 50,000 hours. The cost of these LED bulbs is five to six times the cost of your average light bulbs and requires re-installation and wiring of the bulb holders and maybe a new paint job. The retooling costs seem low compared to the significant power savings. But what about SoCs and the products they are used in?


Similar to my desire to cut power consumption at home, SoC designers want to cut energy costs in their designs for both mobile and wired devices. Traditional techniques used to optimize power at the gate level during synthesis or place and route with low power cells and multi-VT libraries are no longer viable. You need to step up the game and retool your flow. One must estimate power early and accurately at the register transfer level (RTL) to confirm that the design will meet power specifications and optimize the design at that stage if not. Power intent verification (e.g., CPF/UPF) is also done very early and throughout the flow.

SoC designers have adopted all possible power management techniques such as dynamic voltage and frequency scaling (DVFS), power or voltage islands and clock gating to reduce both leakage power and dynamic power. However, my iPhone 4s still gets hot when I use the maps feature or access YouTube videos through the 4G network due to increased processing requirements. These are hard problems to solve. Everyone is familiar with the need of power reduction in hand-held applications. But the problem is now spreading to wired devices as well.


Network processors and server chips consume more than 50 watts of power. The cooling cost for server farms is exorbitant and driving companies like Facebook and Google to set up server farms near the Arctic Circle. These farms consume electricity equivalent to a city of 50,000 people. ARM-based server chips are now adopting the same power management techniques that mobile designers have been using for many years. Calxeda, a startup company, makes ARM-based server chips and claims only 5 watts with a 4G RAM configuration. HP announced a partnership with Calxeda to build very-low-power servers as part of its Project Moonshot. Dell’s Copper servers will be powered by Marvell’s Armada XP chips. Dell’s Copper servers consist of 48 ARM nodes drawing 15 watts each, allowing a fully equipped server to run on less than 750 watts.

The challenge for designers is to not only implement the latest power management techniques but also adopt a new design flow—a design flow that not only estimates power and explores different micro-architectures, but also verifies power intent early. If retooling costs for this new flow can be managed, perhaps SoC designers can get LED technology-type energy savings of 85%. We’ll see.

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