Low Power Trends Toward FinFET

Survey shows nearly a third of all designs are targeting the most advanced process nodes; 10nm tapeouts will happen right on the heels of 14/16nm.


My previous blog, Power Reduction Techniques, covered which low power techniques were applicable for various process nodes, from larger planar CMOS process technologies through finFET. The 16 and 14nm finFET-based process nodes are moving into production this year, and we are seeing many companies rapidly move their designs to finFET. In my last post, I noted some of the reasons why finFET is so compelling for high-performance, low-power designs. Now is a good time to look at some of the design trends that are driving this migration.

Every year, Synopsys sends out a Global User Survey querying the design community on current and future project plans. The results provide a statistically sound approach for understanding industry trends. We always state that designs are getting bigger and more complex, and this year is no exception. The most recent 2014 survey data shows that 20% of all designs are now larger than 50 million gates in size. More than half of these designs are larger than 100 million gates, with the top end approaching 1 billion gates.


When it comes to performance, almost a quarter of all designs operate at a frequency greater than 1GHz, double the amount of designs operating in that range in 2008.


The performance and power aspects of finFET-based technologies are ideal for very large designs that require high performance and low power. It seems to correlate well that almost 25% of all current design projects are targeting the 22nm, 16nm and below finFET-based process nodes. Another 5% of designs are at 20nm, but we expect that many of these will quickly migrate to the finFET-based technologies.


How fast are designs migrating to finFET? When asked about the target technology for their next designs, almost 40% responded that they will target finFET process technologies. What is also evident is how quickly 10nm and below tapeouts are happening right on the heels of 16/14nm. This is unprecedented in terms of time it takes to move from one process technology generation to the next.


In the recent survey, we added the option to specify leakage power as a criteria for moving to a finFET-based process node. As expected, it ranked high as one of the reasons to move, including the fact that performance and dynamic power with lower VDD operation improvements are possible with finFET.


The promise of better performance, power and area is coming to fruition as finFET-based designs have now moved into production. FinFET is poised to become a very popular technology for many high-volume, high-performance products. Although finFET as a topic has quickly grown in popularity over the past year or so, Synopsys has been at the forefront with industry collaboration (academia, foundries, partners, customers) for more than a decade.