Manufacturing Bits: March 3

Security lithography
At the recent SPIE Advanced Lithography conference, Multibeam disclosed more details about its efforts to develop multi-beam direct-write lithography for chip security applications.

David Lam, chief executive and chairman of Multibeam, described how multi-beam lithography can be used to help thwart IC counterfeiting and tampering in the market. This lithography technology can be used to embed a unique ID into each IC during wafer fabrication.

Needless to say, security is a major concern in the semiconductor industry. “We know there are some very determined hackers out there. They can use very sophisticated tools to delayer your chip one layer at a time until they see it,” Lam said. “Counterfeit ICs remain a major problem throughout the semiconductor supply chain. Each critical IC should have a unique tamper-proof identifier to enable verification of authenticity throughout its life cycle, but current anti-counterfeit solutions are costly and fall far short of expectations.”

Nonetheless, Multibeam’s lithography technology is different than optical and extreme ultraviolet (EUV) lithography systems. Both optical and EUV require a photomask to pattern a chip. A photomask is a separate component, which is basically a master template for an IC design. At advanced nodes, the photomask is complex and expensive.

For years, the industry has been developing and selling various lithography systems, which do not require an expensive photomask. This includes what’s commonly called direct-write or maskless lithography.

Originally developed by IBM in the 1980s, direct-write lithography makes use of a single-beam e-beam tool that directly patterns tiny features on a wafer. But the throughputs for e-beam lithography are slow, making it too expensive for volume production. So single-beam direct-write tools are relegated to niche applications.

To solve the throughput problem, the industry has been developing direct-write e-beam systems using multiple beams. Several companies have tried to develop this technology. Most have failed due to technical issues.

Multibeam is still pursuing it. Unlike conventional direct-write lithography systems, which employ a single complex e-beam column, Multibeam takes a multi-column approach. Assembled in an array, Multibeam’s multi-column technology is capable of writing patterns directly on the wafer.

At SPIE, Multibeam described a four-module system. It can be upgraded to six modules. “Basically, we can do 60 wafers per hour with a six-module system,” Lam said.

With the technology, Multibeam is focusing on two areas—full-wafer maskless lithography and security. Full-wafer maskless lithography involves patterning a wafer using Multibeam’s tools. For this, the company is focusing its efforts on more mature nodes, namely 45nm and 28nm. “If you look at the spectrum, our sweet spot is 45nm and above from a node standpoint,” Lam said. Multibeam plans to address advanced nodes down the road.

“The second sweet spot is security,” Lam said. “We will start off with the secure chip ID market. Later on, we will expand into what we call on-chip security.”

In security, though, there are already well-entrenched solutions in the IC market. For some time, the IC industry has used traditional non-volatile memory for secure code storage applications. This memory can store a few bits of authentication information for security purposes using electric-fuse (eFuse) or anti-fuse technology.

The current solutions may not always be full-proof. “The other challenge is that it needs custom fab processing. Then, you have three or four masks to do that. So, you need extra mask steps. And then you also need the drive circuit to activate, implement and provision it. And then finally, people wonder if you can shrink it,” Lam said.

That’s where Multibeam’s technology fits in. Lam calls this “security lithography.” Basically, using multi-beam technology, Multibeam’s system can pattern and embed a unique ID inside each IC during fabrication. The system hard codes the ID at the silicon level, making it tamper-proof. The information can link to a secure database to store individual chip data.

“We recommend doing this at the lowest layer of vias. But you can do it at other layers too. Our system doesn’t require special experience or custom processing. There is no impact on die size or functionality,” Lam said.

More than Moore maskless litho
Also at SPIE, EV Group described more details about its maskless lithography technology.

Recently, EV Group rolled out its MLE (Maskless Exposure) technology. MLE addresses back-end lithography needs for advanced packaging, MEMS, biomedical and PCBs.

In these markets, MLE eliminates the overhead costs associated with photomasks. MLE technology enables high resolutions (<2µm line/space), according to EV Group. The technology accommodates any wafer size up to panels. The system uses clustered multi-wavelength laser light sources operating at 375nm and/or 405nm wavelengths, according to EV Group in an abstract at SPIE.

Others are also developing maskless lithography for packaging and other apps. These systems promise to solve a major issue in fan-out wafer-level packaging. In fan-out, the wafer-like structure used in fan-out is prone to warpage. Then, when the dies are embedded in the wafer, they tend to move, causing an unwanted effect called die shift. This impacts the yield.

Maskless lithography can address and compensate for the problematic die shift effects in fan-out. Traditional optical lithography systems for packaging are also taking steps to address die shift.

TEM movies
The National Institute of Standards and Technology (NIST) has developed a way to turn a transmission electron microscope (TEM) into a system that can create movies of processes at the atomic scale.

Widely used in the industry, a TEM transmits an electron beam through a structure to measure a sample. TEMs can see tiny structures that are fixed in time.

NIST has developed a way to retrofit the TEM. Researchers installed a “beam chopper” in the system. A beam chopper releases precisely timed pulses of electrons that can capture frames of repeating processes. Using this technology, the TEM can make movies on the scale of picoseconds or trillionths of a second.

“A 300 keV transmission electron microscope was modified to produce broadband pulsed beams that can be, in principle, between 40MHz and 12GHz, corresponding to temporal resolution in the nanosecond to picosecond range without an excitation laser,” said June Lau and others from NIST in the Review of Scientific Instruments, a technology journal. “The key enabling technology is a pair of phase-matched modulating and de-modulating traveling wave metallic comb striplines (pulsers). An initial temporal resolution of 30ps was achieved with a strobe frequency of 6.0GHz.

“Electron microscopes can look at very tiny things on the atomic scale,” Lau said. “They are great. But historically, they look at things that are fixed in time. They’re not good at viewing moving targets. We want to be able to look at things in materials science that happen really quickly. (The retrofitted TEM is) expected to be a fraction of the cost of a new electron microscope.”

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