tag: Synopsys

Coherency Becomes A Stack Of Issues
By Ed Sperling - 22 Mar, 2012 - Comments: 0

By Ed Sperling As complexity increases and the industry increasingly shifts away from ASICs to SoCs, the concept of coherency is beginning to look more like a stack of issues than a discrete piece of the design. There are at least five levels of coherency that need to be considered already, with more likely to surface as stacked die become mainstream over the next few years. Perhaps even mo... » read more

The Software Side Of Derivatives
By Ed Sperling - 22 Mar, 2012 - Comments: 0

By Ann Steffora Mutschler With the options and perils associated with derivative designs well articulated today, the elephant remaining in the room is, of course, software. The software aspect of derivatives is bit muddier with some claiming the software can be maintained without modification, while others assert this is simply not possible. One indisputable fact is that software develop... » read more

SoCs Go Mainstream
By Ed Sperling - 22 Mar, 2012 - Comments: 0

By Ed Sperling The monolithic ASIC, which has been the bread-and-butter of chipmakers for decades, is giving way to systems on a chip among mainstream chipmakers and at mainstream process nodes. This shift has been overhyped, overpromised and slow to materialize. While SoCs have been common for years in mobile electronics and for high-performance platforms such as gaming consoles, they have... » read more

Making Sense Of Virtualization
By Achim Nohl - 22 Mar, 2012 - Comments: 0

By Achim Nohl In the last month I’ve had the opportunity to get some hands-on experience with hardware virtualization and hypervisors. My knowledge so far on this has been mainly limited to what I could read about it and what other people are saying about it. However, the PowerPoint slides I’ve seen leave a lot of white fog between the bullet items. This didn’t make me feel very comfo... » read more

New Winners And Losers
By Ed Sperling - 22 Mar, 2012 - Comments: 0

The realignment of the semiconductor industry has begun, most of it beneath the radar screen. In a disaggregated supply chain, any piece in isolation looks insignificant. But taken together, these shifts begin to paint a picture of a broad realignment and refocusing of the entire industry that ultimately will cement the fortunes of some and create new winners and losers out of others. The fi... » read more

Experts At The Table: IP
By Ed Sperling - 16 Mar, 2012 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to talk about IP with John Goodenough, vice president of design technology and automation at ARM; Simon Butler, CEO of Methodics; Navraj Nandra, senior director of marketing for DesignWare analog and mixed signal IP at Synopsys, and Neil Hand, product marketing group director at Cadence. What follows are excerpts of that discussion. LPE: Are w... » read more

Avoiding Chip Melt
By Ed Sperling - 08 Mar, 2012 - Comments: 1

By Ann Steffora Mutschler Assertions. Just the term conjures images of writing boring lines of code to feed into a simulator. But for engineering teams working at the 40nm node, the pain of making sure their verification is complete and accurate is real—and so is the potential for literally melting silicon if something goes wrong. With this in mind, ‘boring’ goes out the window and gets ... » read more

Experts vs. Expertise
By Ed Sperling - 08 Mar, 2012 - Comments: 0

By Ed Sperling The trend in IC design—particularly for large, complex SoCs—is specialization among engineers. There are specialists for layout, for verification, for DFM, for test, and for software, among other things. And there are experts who have a smattering of many of the pieces and can oversee the integration and testing. Power is different. Because power affects every part of a d... » read more

Experts At The Table: IP
By Ed Sperling - 08 Mar, 2012 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to talk about IP with John Goodenough, vice president of design technology and automation at ARM; Simon Butler, CEO of Methodics; Navraj Nandra, senior director of marketing for DesignWare analog and mixed signal IP at Synopsys, and Neil Hand, product marketing group director at Cadence. What follows are excerpts of that discussion. LPE: Where ... » read more

A Necessary Duo: IP And Assertions
By Ann Mutschler - 08 Mar, 2012 - Comments: 0

By Ann Steffora Mutschler Assertions are key to complete and accurate verification, as I dove into here, and there are implications for IP as well. In the case of an embedded processor core that is shipped out as an RTL by the IP vendor, and then used by an engineering team to create a cell phone SoC or to create a consumer SoC for a set-top box or what have you, that core goes into an end ... » read more

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