tag: Synopsys

Hot Potatoes
By Ed Sperling - 28 Jan, 2011 - Comments: 0

Matching hardware to software, and software to hardware, is an interesting discussion. It’s also one that usually happens at a very high-level of abstraction, which renders many of the conclusions less than helpful. The software stack is not a single thing. It’s a group of things, all incredibly complex in their own right and increasingly in need of some very detailed integration. The fa... » read more

Connecting System-Level Flows To Implementation Tools
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler With the complexity explosion occurring in SoC design today, there is a relentless force to push design decisions further up in terms of abstraction. Resolving issues at the gate level is not possible any more because there just isn’t enough time or resources. Further, the resulting design may not even be competitive because optimization at the gate level can leave ... » read more

What’s A Cell Phone?
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ed Sperling Just because a smart phone is sold by Verizon or AT&T mobile no longer means that it will be used primarily as a phone. That distinction may sound trivial, but it has deep implications for the components that are used inside of these devices, how they’re used, and who wins the designs. Shifts such as this can also lead to broad changes in who buys the tools to develop t... » read more

Connecting System-Level Flows To Implementation Tools
By Ed Sperling - 27 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler With the complexity explosion occurring in SoC design today, there is a relentless force to push design decisions further up in terms of abstraction. Resolving issues at the gate level is not possible any more because there just isn’t enough time or resources. Further, the resulting design may not even be competitive because optimization at the gate level can leave ... » read more

Power Model Complexity Grows
By Ed Sperling - 13 Jan, 2011 - Comments: 0

By Ed Sperling The number of factors required for an effective power model has far surpassed the capabilities of even the most detailed spreadsheet at 45nm and beyond. It has now entered the realm of complex databases and architectural tradeoffs, and those tradeoffs will become even more complex as 3D stacking takes root over the next 24 months. The idea of modeling power is hardly new, but... » read more

Material Effects: Trading Performance For Power
By Ed Sperling - 13 Jan, 2011 - Comments: 0

By Ann Steffora Mutschler Power impacts everything, even when it comes to semiconductor manufacturing materials. While bulk CMOS technology still reigns supreme, there are a number of advanced materials being suggested as replacements when it runs out of steam at around 15nm, including silicon on insulator (SOI)—particularly in combination with FinFET multigate structures on SOI—silicon ge... » read more

The Elusive Min Power Definition
By Ed Sperling - 10 Jan, 2011 - Comments: 0

By Ed Sperling Put a fully charged smart phone in a bad reception area and the battery will run out in a fraction of the time it normally lasts in a good reception area. While this may be an annoyance to consumers, who need to recharge their phones more often, it’s a serious problem in SoC design. Minimum power should be a simple number, but the reality is it’s more like a distribution ... » read more

Blog Review: Jan. 5
By Ed Sperling - 05 Jan, 2011 - Comments: 0

By Ed Sperling Mentor’s Robin Bornoff returns to his beer fridge with a New Year’s resolution for sobriety and a revelation that an empty refrigerator never cools as well as a full one. Well, there’s always Diet Coke and double-shot iced espresso. Cadence’s Tom Anderson sheds some long overdue light on the famous processor “divide bug” that generated mostly right answers. This o... » read more

Experts At The Table: IP Integration Hurdles
By Ed Sperling - 17 Dec, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss IP integration issues with Ken Brock, senior staff product marketing manager for logic libraries in Synopsys’ Solutions Group; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversati... » read more

Supply Chain Adjusts To Design At The System Level
By Ed Sperling - 16 Dec, 2010 - Comments: 0

By Ann Steffora Mutschler System-level design is impacting the supply chain at many levels. Software suppliers, IP providers, semiconductor companies, system integrators and OEMs are challenged to work ever more closely together and find a new balance of power for who controls what in the content of an SoC. “We see more and more the design chain driving how our tools work together,” Fra... » read more

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