How a high-performance SoC uses clock generation module (CGM) with distributed clocking.
Core counts have been increasing steadily since IBM’s debut of the Power 4 in 2001, eclipsing 100 CPU cores and over 1,000 for AI accelerators. While sea of processor architectures feature a stamp and repeat design, per-core workloads aren’t always going to be symmetrically balanced. For example, a cloud provider (AI or compute) will rent out individual core clusters to customers for specialized and varied workloads. OEMs and data center operators can tackle this asymmetry through fine-grain, per-cluster performance turning.
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